Logic Diagram (SN74)
20
1
2
4
5
1A
1B
1C
1D
DUAL 4-INPUT
POSITIVE-NAND
GATES
6
1Y
9
2A
2B
2C
2D
● Y = A•B•C•D
● 74AC11xxx: Product Available in Reduced-Noise
Advanced CMOS (11000 Series)
10
12
13
8
2Y
● 74ACT11xxx: Product Available in Reduced-Noise
Advanced CMOS (11000 Series)
FUNCTION TABLE
(each gate)
INPUTS
OUTPUT
Y
A
B
C
D
H
L
H
X
L
H
X
X
L
H
X
X
X
L
L
H
H
H
H
X
X
X
X
X
X
ELECTRICAL CHARACTERISTICS AND RECOMMENDED OPERATING CONDITIONS
SN74 CD74 CD74
PARAMETER
MAX or MIN
TTL
LS
S
ALS
AS
F
UNIT
HC
HC
HCT
ICC
MAX
MAX
MAX
11
-0.4
16
2.2
-0.4
8
18
-1
1.5
-0.4
8
8.7
-2
5.1
-1
0.02
-4
0.04
-4
0.04
-4
mA
mA
mA
IOH
IOL
20
20
20
4
4
4
AC
11
CD74 ACT CD74
LV
3V
LV
5V
PARAMETER
MAX or MIN
UNIT
AC
11
ACT
0.04
-24
24
0.04
-24
24
-
-6
6
0.02
-12
12
ICC
IOH
IOL
MAX
MAX
MAX
0.08
-24
24
0.08
-24
24
mA
mA
mA
SWITCHING CHARACTERISTICS
SN74 CD74 CD74
PARAMETER
INPUT
OUTPUT
MAX or MIN
TTL
LS
S
ALS
AS
F
6
HC
HC
HCT
tPLH
tPHL
A, B, C or D
A, B, C or D
Y
Y
MAX
MAX
22
15
15
15
4.5
5
11
10
5
28
28
30
30
42
42
4.5
5.3
AC
11
CD74 ACT CD74
LV
3V
LV
5V
PARAMETER
INPUT
OUTPUT
MAX or MIN
AC
11
ACT
tPLH
A, B, C or D
A, B, C or D
Y
Y
MAX
MAX
6.7
7.3
12.2
12.2
9.1
9.2
13.5
13.5
11.5
11.5
8
8
tPHL
UNIT: ns
245
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty.
Production processing does not necessarily include testing of all parameters. See www.ti.com/sc/logic for the most current data sheets.