RM46L450
RM46L850
SPNS184 –SEPTEMBER 2012
www.ti.com
2.3.1.12 Multi-Buffered Serial Peripheral Interface Modules (MibSPI)
Table 2-12. PGE Multi-Buffered Serial Peripheral Interface Modules (MibSPI)
Terminal
Signal
Type
Default
Pull State
Pull Type
Description
Signal Name
144
PGE
MIBSPI1CLK
95
I/O
Pull Up
Programmable, MibSPI1 clock, or GIO
20uA
MIBSPI1NCS[0]/MIBSPI1SOMI[1]/MII_TXD[2]/
105
MibSPI1 chip select, or
USB1.RCV/ECAP6
GIO
MIBSPI1NCS[1]/N2HET1[17]/MII_COL
130
/USB1.SUSPEND /EQEP1S
MIBSPI1NCS[2]/N2HET1[19]/MDIO
40
41
91
96
N2HET1[15]/MIBSPI1NCS[4]/ECAP1
Pull Down Programmable, MibSPI1 chip select, or
20uA GIO
N2HET1[24]/MIBSPI1NCS[5]/MII_RXD[0]/RMII_RXD[0]
MIBSPI1NENA/N2HET1[23]/MII_RXD[2]/
Pull Up
Programmable, MibSPI1 enable, or GIO
20uA
USB1.VP/ECAP4
MIBSPI1SIMO
93
MibSPI1 slave-in master-
out, or GIO
N2HET1[08]/MIBSPI1SIMO[1]/MII_TXD[3]/
USB1.OverCurrent
106
Pull Down Programmable, MibSPI1 slave-in master-
20uA out, or GIO
MIBSPI1SOMI
94
Pull Up
Programmable, MibSPI1 slave-out master-
20uA in, or GIO
MIBSPI1NCS[0]/MIBSPI1SOMI[1]/MII_TXD[2]/
105
USB1.RCV/ECAP6
MIBSPI3CLK/AWM1_EXT_SEL[1]/EQEP1A
53
55
I/O
Pull Up
Programmable, MibSPI3 clock, or GIO
20uA
MIBSPI3NCS[0]/AD2EVT/GIOB[2]/EQEP1I/N2HET2_PIN_nD
MibSPI3 chip select, or
IS
GIO
MIBSPI3NCS[1]/N2HET1[25]/MDCLK
37
4
MIBSPI3NCS[2]/I2C_SDA/N2HET1[27]/nTZ2
MIBSPI3NCS[3]/I2C_SCL/N2HET1[29]/nTZ1
3
N2HET1[11]/MIBSPI3NCS[4]/N2HET2[18]/
USB2.OverCurrent/USB_FUNC.VBUSI/EPWM1SYNCO
6
Pull Down Programmable, MibSPI3 chip select, or
20uA GIO
MIBSPI3NENA /MIBSPI3NCS[5]/N2HET1[31]/EQEP1B
54
Pull Up
Programmable, MibSPI3 chip select, or
20uA
GIO
MIBSPI3NENA/MIBSPI3NCS[5]/N2HET1[31]/EQEP1B
MIBSPI3SIMO/AWM1_EXT_SEL[0]/ECAP3
54
52
MibSPI3 enable, or GIO
MibSPI3 slave-in master-
out, or GIO
MIBSPI3SOMI/AWM1_EXT_ENA/ECAP2
51
MibSPI3 slave-out master-
in, or GIO
MIBSPI5CLK/MII_TXEN/RMII_TXEN
MIBSPI5NCS[0]/EPWM4A
100
32
I/O
Pull Up
Programmable, MibSPI5 clock, or GIO
20uA
MibSPI5 chip select, or
GIO
MIBSPI5NENA/MII_RXD[3]/USB1.VM/MIBSPI5SOMI[1]/ECA
P5
97
99
98
97
99
MibSPI5 enable, or GIO
MIBSPI5SIMO[0]/MII_TXD[1]/RMII_TXD[1]/MIBSPI5SOMI[2]
MibSPI5 slave-in master-
out, or GIO
MIBSPI5SOMI[0]/MII_TXD[0]/RMII_TXD[0]
MibSPI5 slave-out master-
in, or GIO
MIBSPI5NENA/MII_RXD[3]/USB1.VM/MIBSPI5SOMI[1]/ECA
P5
MibSPI5 SOMI, or GIO
MIBSPI5SIMO[0]/MII_TXD[1]/RMII_TXD[1]/MIBSPI5SOMI[2]
MibSPI5 SOMI, or GIO
18
Device Package and Terminal Functions
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