Table
Title
Page
9−3
9−4
9−5
9−6
9−7
9−8
9−9
Status Register Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9−4
Class Code and Revision ID Register Description . . . . . . . . . . . . . . . . . . . 9−5
Latency Timer and Class Cache Line Size Register Description . . . . . . . 9−5
Header Type and BIST Register Description . . . . . . . . . . . . . . . . . . . . . . . . 9−6
PCI Interrupt Pin Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9−9
Minimum Grant Register Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9−9
Maximum Latency Register Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9−10
9−10 Capability ID and Next Item Pointer Registers Description . . . . . . . . . . . . 9−10
9−11 Power Management Capabilities Register Description . . . . . . . . . . . . . . . 9−11
9−12 Power Management Control and Status Register Description . . . . . . . . . 9−12
9−13 General Control Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9−13
9−14 Subsystem ID Alias Register Description . . . . . . . . . . . . . . . . . . . . . . . . . . . 9−14
9−15 Smart Card Configuration 1 Register Description . . . . . . . . . . . . . . . . . . . . 9−16
9−16 Smart Card Configuration 2 Register Description . . . . . . . . . . . . . . . . . . . . 9−17
xiv