PCA9555
REMOTE 16-BIT I2C AND SMBus I/O EXPANDER
WITH INTERRUPT OUTPUT AND CONFIGURATION REGISTERS
www.ti.com
SCPS131D–AUGUST 2005–REVISED OCTOBER 2006
1
2
3
4
5
6
7
8
9
SCL
SDA
I0.x
I1.x
I0.x
I1.x
S
0
1
0
0
A2 A1 A0
1
A
00
A
10
A
03
A
1
P
12
Acknowledge
From Master
Acknowledge
From Master
Acknowledge
From Slave
Acknowledge
From Master
R/W
No Acknowledge
From Master
t
ps
t
ph
Read From Port 0
Data Into Port 0
Data 00
Data 01
Data 02
Data 03
t
t
ps
ph
Read From Port 1
11
12
Data
Data 10
Data
Data Into Port 1
INT
t
ir
t
iv
A. Transfer of data can be stopped at any time by a Stop condition. When this occurs, data present at the latest
acknowledge phase is valid (output mode). It is assumed that the command byte previously has been set to 00 (read
Input Port register).
B. This figure eliminates the command byte transfer, a restart, and slave address call between the initial slave address
call and actual data transfer from the P port (see Figure 8 for these details).
Figure 10. Read Input Port Register, Scenario 2
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