SBOS649C – SEPTEMBER 2012 – REVISED MARCH 2013
ELECTRICAL CHARACTERISTICS: +5.5 V
(1)
At T
A
= +25 °C, R
L
= 10 kΩ connected to V
S
/ 2, and V
CM
= V
OUT
= V
S
/ 2, unless otherwise noted.
OPA313, OPA2313, OPA4313
PARAMETER
OFFSET VOLTAGE
V
OS
dV
OS
/dT
PSRR
Input offset voltage
vs Temperature
vs power supply
Channel separation, dc
INPUT VOLTAGE RANGE
V
CM
Common-mode voltage range
No phase reversal, rail-to-rail input
T
A
= –40°C to +125°C,
(V
S
–) – 0.2 V < V
CM
< (V
S
+) – 1.3 V
T
A
= –40°C to +125°C,
V
CM
= –0.2 V to 5.7 V
(V–) – 0.2
70
64
85
80
(V+) + 0.2
V
dB
dB
T
A
= –40°C to +125°C
T
A
= –40°C to +125°C
At dc
74
0.5
2
90
10
2.5
mV
μV/°C
dB
µV/V
TEST CONDITIONS
MIN
TYP
MAX
UNIT
CMRR
Common-mode rejection ratio
INPUT BIAS CURRENT
±0.2
I
B
Input bias current
T
A
= –40°C to +85°C
(2)
±10
±50
±600
pA
pA
pA
pA
pA
pA
T
A
= –40°C to +125°C
(2)
±0.2
I
OS
NOISE
Input voltage noise (peak-to-
peak)
e
n
i
n
Input voltage noise density
Input current noise density
f = 0.1 Hz to 10 Hz
f = 10 kHz
f = 1 kHz
f = 1 kHz
6
22
25
5
Input offset current
T
A
= –40°C to +85°C
(2)
(2)
±10
±50
±600
T
A
= –40°C to +125°C
μV
PP
nV/√Hz
nV/√Hz
fA/√Hz
INPUT CAPACITANCE
C
IN
Differential
Common-mode
1
5
pF
pF
OPEN-LOOP GAIN
0.05 V < V
O
< (V+) – 0.05 V, R
L
= 100 kΩ
A
OL
Open-loop voltage gain
T
A
= –40°C to +125°C, 0.1 V < V
O
< (V+) – 0.1 V
0.3 V < V
O
< (V+) – 0.3 V, R
L
= 2 kΩ
Phase margin
V
S
= 5.0 V, G = +1
90
104
100
104
116
110
65
dB
dB
dB
degrees
(1)
(2)
Parameters with minimum or maximum specification limits are 100% production tested at +25ºC, unless otherwise noted. Over
temperature limits are based on characterization and statistical analysis.
Specified by design and characterization; not production tested.
Copyright © 2012–2013, Texas Instruments Incorporated
3
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