MSP430G2955
MSP430G2855
MSP430G2755
SLAS800 –MARCH 2013
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MAX UNIT
Crystal Oscillator LFXT1, High-Frequency Mode(1)
PARAMETER
TEST CONDITIONS
VCC
MIN
TYP
LFXT1 oscillator crystal
frequency, HF mode 0
fLFXT1,HF0
fLFXT1,HF1
XTS = 1, LFXT1Sx = 0
XTS = 1, LFXT1Sx = 1
1.8 V to 3.6 V
0.4
1
MHz
MHz
LFXT1 oscillator crystal
frequency, HF mode 1
1.8 V to 3.6 V
1
4
1.8 V to 3.6 V
2.2 V to 3.6 V
3 V to 3.6 V
2
2
10
LFXT1 oscillator crystal
frequency, HF mode 2
fLFXT1,HF2
XTS = 1, LFXT1Sx = 2
XTS = 1, LFXT1Sx = 3
12 MHz
2
16
1.8 V to 3.6 V
2.2 V to 3.6 V
3 V to 3.6 V
0.4
0.4
0.4
10
LFXT1 oscillator logic-level
square-wave input frequency,
HF mode
fLFXT1,HF,logic
12 MHz
16
XTS = 1, LFXT1Sx = 0,
fLFXT1,HF = 1 MHz,
CL,eff = 15 pF
2700
800
Oscillation allowance for HF
crystals (see Figure 20 and
Figure 21)
XTS = 1, LFXT1Sx = 1,
fLFXT1,HF = 4 MHz,
CL,eff = 15 pF
OAHF
Ω
XTS = 1, LFXT1Sx = 2,
fLFXT1,HF = 16 MHz,
CL,eff = 15 pF
300
1
Integrated effective load
capacitance, HF mode(2)
CL,eff
XTS = 1(3)
pF
XTS = 1,
Measured at P2.0/ACLK,
fLFXT1,HF = 10 MHz
40
50
60
Duty cycle, HF mode
2.2 V, 3 V
2.2 V, 3 V
%
XTS = 1,
Measured at P2.0/ACLK,
fLFXT1,HF = 16 MHz
XTS = 1, LFXT1Sx = 3(5)
40
30
50
60
fFault,HF
Oscillator fault frequency(4)
300 kHz
(1) To improve EMI on the XT1 oscillator the following guidelines should be observed:
(a) Keep the trace between the device and the crystal as short as possible.
(b) Design a good ground plane around the oscillator pins.
(c) Prevent crosstalk from other clock or data lines into oscillator pins XIN and XOUT.
(d) Avoid running PCB traces underneath or adjacent to the XIN and XOUT pins.
(e) Use assembly materials and praxis to avoid any parasitic load on the oscillator XIN and XOUT pins.
(f) If conformal coating is used, ensure that it does not induce capacitive or resistive leakage between the oscillator pins.
(g) Do not route the XOUT line to the JTAG header to support the serial programming adapter as shown in other documentation. This
signal is no longer required for the serial programming adapter.
(2) Includes parasitic bond and package capacitance (approximately 2 pF per pin). Because the PCB adds additional capacitance, it is
recommended to verify the correct load by measuring the ACLK frequency. For a correct setup, the effective load capacitance should
always match the specification of the used crystal.
(3) Requires external capacitors at both terminals. Values are specified by crystal manufacturers.
(4) Frequencies below the MIN specification set the fault flag, frequencies above the MAX specification do not set the fault flag, and
frequencies in between might set the flag.
(5) Measured with logic-level input frequency, but also applies to operation with crystals.
32
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