欢迎访问ic37.com |
会员登录 免费注册
发布采购

MSP430F6724IPNR 参数 Datasheet PDF下载

MSP430F6724IPNR图片预览
型号: MSP430F6724IPNR
PDF下载: 下载PDF文件 查看货源
内容描述: 混合信号微控制器 [MIXED SIGNAL MICROCONTROLLER]
分类和应用: 微控制器
文件页数/大小: 121 页 / 1013 K
品牌: TI [ TEXAS INSTRUMENTS ]
 浏览型号MSP430F6724IPNR的Datasheet PDF文件第1页浏览型号MSP430F6724IPNR的Datasheet PDF文件第3页浏览型号MSP430F6724IPNR的Datasheet PDF文件第4页浏览型号MSP430F6724IPNR的Datasheet PDF文件第5页浏览型号MSP430F6724IPNR的Datasheet PDF文件第6页浏览型号MSP430F6724IPNR的Datasheet PDF文件第7页浏览型号MSP430F6724IPNR的Datasheet PDF文件第8页浏览型号MSP430F6724IPNR的Datasheet PDF文件第9页  
MSP430F673x  
MSP430F672x  
SLAS731A DECEMBER 2011REVISED APRIL 2012  
www.ti.com  
DESCRIPTION  
The Texas Instruments MSP430 family of ultra-low-power microcontrollers consists of several devices featuring  
different sets of peripherals targeted for various applications. The architecture, combined with extensive low-  
power modes, is optimized to achieve extended battery life in portable measurement applications. The device  
features a powerful 16-bit RISC CPU, 16-bit registers, and constant generators that contribute to maximum code  
efficiency. The digitally controlled oscillator (DCO) allows wake-up from low-power modes to active mode in 3 µs  
(typical).  
The MSP430F67xx series are microcontroller configurations with three high-performance 24-bit sigma-delta A/D  
converters, a 10-bit analog-to-digital (A/D) converter, four enhanced universal serial communication interfaces  
(three eUSCI_A and one eUSCI_B), four 16-bit timers, hardware multiplier, DMA, real-time clock module with  
alarm capabilities, LCD driver with integrated contrast control, auxiliary supply system, and up to 72 I/O pins in  
100-pin devices and 52 I/O pins in 80-pin devices.  
Typical applications for these devices are 2-wire and 3-wire single-phase metering, including tamper-resistant  
meter implementations.  
Family members available are summarized in Table 1.  
Table 1. Family Members  
eUSCI  
Flash  
(KB)  
SRAM  
(KB)  
SD24_B  
Converters  
ADC10_A  
Channels  
Package  
Type  
Timer_A(1)  
I/O  
Channel A:  
UART, IrDA,  
SPI  
Channel B:  
SPI, I2C  
Device  
MSP430F6736IPZ  
MSP430F6735IPZ  
MSP430F6734IPZ  
MSP430F6733IPZ  
MSP430F6731IPZ  
MSP430F6730IPZ  
MSP430F6726IPZ  
MSP430F6725IPZ  
MSP430F6724IPZ  
MSP430F6723IPZ  
MSP430F6721IPZ  
MSP430F6720IPZ  
MSP430F6736IPN  
MSP430F6735IPN  
MSP430F6734IPN  
MSP430F6733IPN  
MSP430F6731IPN  
MSP430F6730IPN  
MSP430F6726IPN  
MSP430F6725IPN  
MSP430F6724IPN  
MSP430F6723IPN  
MSP430F6721IPN  
MSP430F6720IPN  
128  
128  
96  
8
4
4
4
2
1
8
4
4
4
2
1
8
4
4
4
2
1
8
4
4
4
2
1
3
3
3
3
3
3
2
2
2
2
2
2
3
3
3
3
3
3
2
2
2
2
2
2
6 ext, 2 int  
6 ext, 2 int  
6 ext, 2 int  
6 ext, 2 int  
6 ext, 2 int  
6 ext, 2 int  
6 ext, 2 int  
6 ext, 2 int  
6 ext, 2 int  
6 ext, 2 int  
6 ext, 2 int  
6 ext, 2 int  
3 ext, 2 int  
3 ext, 2 int  
3 ext, 2 int  
3 ext, 2 int  
3 ext, 2 int  
3 ext, 2 int  
3 ext, 2 int  
3 ext, 2 int  
3 ext, 2 int  
3 ext, 2 int  
3 ext, 2 int  
3 ext, 2 int  
3, 2, 2, 2  
3, 2, 2, 2  
3, 2, 2, 2  
3, 2, 2, 2  
3, 2, 2, 2  
3, 2, 2, 2  
3, 2, 2, 2  
3, 2, 2, 2  
3, 2, 2, 2  
3, 2, 2, 2  
3, 2, 2, 2  
3, 2, 2, 2  
3, 2, 2, 2  
3, 2, 2, 2  
3, 2, 2, 2  
3, 2, 2, 2  
3, 2, 2, 2  
3, 2, 2, 2  
3, 2, 2, 2  
3, 2, 2, 2  
3, 2, 2, 2  
3, 2, 2, 2  
3, 2, 2, 2  
3, 2, 2, 2  
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
72  
72  
72  
72  
72  
72  
72  
72  
72  
72  
72  
72  
52  
52  
52  
52  
52  
52  
52  
52  
52  
52  
52  
52  
100 PZ  
100 PZ  
100 PZ  
100 PZ  
100 PZ  
100 PZ  
100 PZ  
100 PZ  
100 PZ  
100 PZ  
100 PZ  
100 PZ  
80 PN  
80 PN  
80 PN  
80 PN  
80 PN  
80 PN  
80 PN  
80 PN  
80 PN  
80 PN  
80 PN  
80 PN  
64  
32  
16  
128  
128  
96  
64  
32  
16  
128  
128  
96  
64  
32  
16  
128  
128  
96  
64  
32  
16  
(1) Each number in the sequence represents an instantiation of Timer_A with its associated number of capture compare registers and PWM  
output generators available. For example, a number sequence of 3, 5 would represent two instantiations of Timer_A, the first  
instantiation having 3 and the second instantiation having 5 capture compare registers and PWM output generators, respectively.  
2
Copyright © 2011–2012, Texas Instruments Incorporated