OBSOLETE
LMX2315, LMX2320, LMX2325
www.ti.com
SNAS101E –SEPTEMBER 1996–REVISED MARCH 2013
PROGRAMMABLE DIVIDER (N COUNTER)
The N counter consists of the 7-bit swallow counter (A counter) and the 11-bit programmable counter (B
counter). If the Control Bit (last bit shifted into the Data Register) is LOW, data is transferred from the 19-bit shift
register into a 7-bit latch (which sets the 7-bit Swallow (A) Counter) and an 11-bit latch (which sets the 11-bit
programmable (B) Counter). Serial data format is shown below.
Note: S8 to S18: Programmable counter divide ratio control bits (3 to 2047)
7-BIT SWALLOW COUNTER DIVIDE RATIO (A COUNTER)(1)
Divide
S
7
S
6
S
5
S
4
S
3
S
2
S
1
Ratio
A
0
0
0
•
0
0
•
0
0
•
0
0
•
0
0
•
0
0
•
0
1
•
1
•
127
1
1
1
1
1
1
1
(1) Divide ratio: 0 to 127
B ≥ A
11-BIT PROGRAMMABLE COUNTER DIVIDE RATIO (B COUNTER)(1)
Divide
S
18
S
17
S
16
S
15
S
14
S
13
S
12
S
11
S
10
S
9
S
8
Ratio
B
3
0
0
•
0
0
•
0
0
•
0
0
•
0
0
•
0
0
•
0
0
•
0
0
•
0
1
•
1
0
•
1
0
•
4
•
2047
1
1
1
1
1
1
1
1
1
1
1
(1) Divide ratio: 3 to 2047 (Divide ratios less than 3 are prohibited)
B ≥ A
PULSE SWALLOW FUNCTION
fVCO = [(P × B) + A] × fOSC/R
fVCO: Output frequency of external voltage controlled oscillator (VCO)
B:
A:
Preset divide ratio of binary 11-bit programmable counter (3 to 2047)
Preset divide ratio of binary 7-bit swallow counter
(0 ≤ A ≤ 127, A ≤ B)
fOSC: Output frequency of the external reference frequency oscillator
R:
P:
Preset divide ratio of binary 14-bit programmable reference counter (3 to 16383)
Preset modulus of dual moduIus prescaler (64 or 128 for 2315/20 or 32 or 64 for 2325)
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