LMC6482
SNOS674D –NOVEMBER 1997–REVISED MARCH 2013
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The effect of input capacitance can be compensated for by adding a feedback capacitor. The feedback capacitor
(as in Figure 63), Cf, is first estimated by:
(1)
or
R1 CIN ≤ R2 Cf
(2)
which typically provides significant overcompensation.
Printed circuit board stray capacitance may be larger or smaller than that of a bread-board, so the actual
optimum value for Cf may be different. The values of Cf should be checked on the actual circuit. (Refer to the
LMC660 quad CMOS amplifier data sheet for a more detailed discussion.)
PRINTED-CIRCUIT-BOARD LAYOUT FOR HIGH-IMPEDANCE WORK
It is generally recognized that any circuit which must operate with less than 1000pA of leakage current requires
special layout of the PC board. When one wishes to take advantage of the ultra-low input current of the
LMC6482, typically less than 20fA, it is essential to have an excellent layout. Fortunately, the techniques of
obtaining low leakages are quite simple. First, the user must not ignore the surface leakage of the PC board,
even through it may sometimes appear acceptably low, because under conditions of high humidity or dust or
contamination, the surface leakage will be appreciable.
To minimize the effect of any surface leakage, lay out a ring of foil completely surrounding the LM6482's inputs
and the terminals of capacitors, diodes, conductors, resistors, relay terminals, etc. connected to the op-amp's
inputs, as in Figure 64. To have a significant effect, guard rings should be placed on both the top and bottom of
the PC board. This PC foil must then be connected to a voltage which is at the same voltage as the amplifier
inputs, since no leakage current can flow between two points at the same potential. For example, a PC board
trace-to-pad resistance of 1012Ω, which is normally considered a very large resistance, could leak 5pA if the trace
were a 5V bus adjacent to the pad of the input. This would cause a 250 times degradation from the LMC6482's
actual performance. However, if a guard ring is held within 5 mV of the inputs, then even a resistance of 1011Ω
would cause only 0.05pA of leakage current. See Figure 65 through Figure 67 for typical connections of guard
rings for standard op-amp configurations.
Figure 64. Example of Guard Ring in P.C. Board Layout Typical Connections of Guard Rings
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