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LM3485MM-NOPB 参数 Datasheet PDF下载

LM3485MM-NOPB图片预览
型号: LM3485MM-NOPB
PDF下载: 下载PDF文件 查看货源
内容描述: 迟滞PFET降压控制器 [Hysteretic PFET Buck Controller]
分类和应用: 控制器
文件页数/大小: 23 页 / 1030 K
品牌: TI [ TEXAS INSTRUMENTS ]
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SNVS178G – JANUARY 2002 – REVISED FEBRUARY 2013
Electrical Characteristics
Specifications in Standard type face are for T
J
= 25°C, and in
bold type face
apply over the full
Operating Temperature
Range
(T
J
=
−40°C
to +125°C). Unless otherwise specified, V
IN
= 12V, V
ISNS
= V
IN
1V, and V
ADJ
= V
IN
1.1V. Datasheet
min/max specification limits are specified by design, test, or statistical analysis.
Symbol
I
Q
V
FB
V
HYST
V
CL (4)
V
CL_OFFSET
I
CL_ADJ
T
CL
Parameter
Quiescent Current at ground pin
Feedback Voltage
(3)
Test Conditions
FB = 1.5V
(Not Switching)
Min
(1)
Typ
(2)
250
Max
(1)
400
1.258
1.267
15
20
Unit
µA
V
mV
mV
1.226
1.217
1.242
10
14
110
880
Comparator Hysteresis
Current limit comparator trip voltage R
ADJ
= 20kΩ
R
ADJ
= 160kΩ
Current limit comparator offset
Current limit ADJ current source
Current limit one shot off time
V
FB
= 1.5V
V
FB
= 1.5V
V
ADJ
= 11.5V
V
ISNS
= 11.0V
V
FB
= 1.0V
Source
I
SOURCE
= 100mA
Sink
I
Sink
= 100mA
−20
3.0
6
0
5.5
9
+20
7.0
14
mV
µA
µs
R
PGATE
Driver resistance
5.5
8.5
0.44
I
PGATE
Driver Output current
Source
V
IN
= 7V,
P
GATE
= 3.5V
Sink
V
IN
= 7V,
P
GATE
= 3.5V
A
0.32
I
FB
T
ONMIN_NOR
T
ONMIN_CL
FB pin Bias Current
(5)
Minimum on time in normal
operation
Minimum on time in current limit
V
FB
= 1.0V
V
ISNS
= V
ADJ
+0.1V
C
load
on OUT = 1000pF
(6)
V
ISNS
= V
ADJ
+0.1V
V
FB
= 1.0V
C
load
on OUT = 1000pF
(6)
4.5
V
IN
35V
300
100
175
750
nA
ns
ns
%V
FB
/ΔV
IN
(1)
(2)
(3)
(4)
(5)
(6)
Feedback Voltage Line Regulation
0.010
%/V
All limits are specified at room temperature (standard type face) and at
temperature extremes (bold type face).
All room temperature
limits are 100% tested. All limits at
temperature extremes
are specified via correlation using standard Statistical Quality Control (SQC)
methods. All limits are used to calculate Average Outgoing Quality Level (AOQL).
Typical numbers are at 25°C and represent the most likely norm.
The V
FB
is the trip voltage at the FB pin when PGATE switches from high to low.
V
CL
= I
CL_ADJ
* R
ADJ
Bias current flows out from the FB pin.
A 1000pF capacitor is connected between V
IN
and PGATE.
Copyright © 2002–2013, Texas Instruments Incorporated
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