SNVS682C – NOVEMBER 2010 – REVISED MAY 2013
V+
D3
+
D9
C10
D8
D4
R8
+
C9
V
BUCK
V
+
D3
V
BUCK
C7
R6
C7
+
D6
D8
R8
+
D9
C10
+
R6
R7
D4
D5
C8
D7
C9
R7
Figure 12. Two and Three Stage Valley Fill Circuit
The valley-fill circuit allows the buck regulator to draw power throughout a larger portion of the AC line. This
allows the capacitance needed at V
BUCK
to be lower than if there were no valley-fill circuit, and adds passive
power factor correction (PFC) to the application.
VALLEY-FILL OPERATION
When the “input line is high”, power is derived directly through D3. The term “input line is high” can be explained
as follows. The valley-fill circuit charges capacitors C7 and C9 in series (Figure
when the input line is high.
V
BUCK
V+
D3
+
C7 + V
BUCK
2
-
C10
D8
D4
+
V
BUCK
2
-
+
C9
Figure 13. Two stage Valley-Fill Circuit when AC Line is High
The peak voltage of a two stage valley-fill capacitor is:
V
VF-CAP
=
V
AC-RMS
2
2
(1)
As the AC line decreases from its peak value every cycle, there will be a point where the voltage magnitude of
the AC line is equal to the voltage that each capacitor is charged. At this point diode D3 becomes reversed
biased, and the capacitors are placed in parallel to each other (Figure
and V
BUCK
equals the capacitor
voltage.
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