LM1117/LM1117I
Symbol
Parameter
Ripple Regulation
Adjust Pin Current
Adjust Pin Current
Change
Temperature Stability
Long Term Stability
RMS Output Noise
Thermal Resistance
Junction-to-Case
Thermal Resistance
Junction-to-Ambient
No air flow)
Conditions
f
RIPPLE
=1 20Hz, V
IN
-V
OUT
= 3V V
RIPPLE
=
1V
PP
10
≤
I
OUT
≤
800mA,
Min
5)
60
Typ
75
60
Max
Units
dB
120
10
μA
μA
%
%
%
°C/W
°C/W
°C/W
°C/W
°C/W
1.4V
≤
V
IN
-V
OUT
≤
10V
T
A
= 125°C, 1000Hrs
(% of V
OUT
), 10Hz
≤
f
≤
10kHz
3-Lead SOT-223
3-Lead TO-252
3-Lead SOT-223 (No heat sink)
3-Lead TO-252 (No heat sink)(Note
8-Lead LLP(Note
0.2
0.5
0.3
0.003
15.0
10
136
92
40
Note 1:
Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is
intended to be functional, but specific performance is not guaranteed. For guaranteed specifications and the test conditions, see the Electrical Characteristics.
Note 2:
The maximum power dissipation is a function of T
J(max)
, θ
JA
, and T
A
. The maximum allowable power dissipation at any ambient temperature is
P
D
= (T
J(max)
–T
A
)/θ
JA
. All numbers apply for packages soldered directly into a PC board.
Note 3:
For testing purposes, ESD was applied using human body model, 1.5kΩ in series with 100pF.
Note 4:
Typical Values represent the most likely parametric norm.
Note 5:
All limits are guaranteed by testing or statistical analysis.
Note 6:
Load and line regulation are measured at constant junction room temperature.
Note 7:
The dropout voltage is the input/output differential at which the circuit ceases to regulate against further reduction in input voltage. It is measured when
the output voltage has dropped 100mV from the nominal value obtained at V
IN
= V
OUT
+1.5V.
Note 8:
The minimum output current required to maintain regulation.
Note 9:
Minimum pad size of 0.038in
2
Note 10:
Thermal Performance for the LLP was obtained using JESD51-7 board with six vias and an ambient temperature of 22°C. For information about improved
thermal performance and power dissipation for the LLP, refer to Application Note AN-1187.
8
Copyright © 1999-2012, Texas Instruments Incorporated