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DS92LV1212AMSA 参数 Datasheet PDF下载

DS92LV1212AMSA图片预览
型号: DS92LV1212AMSA
PDF下载: 下载PDF文件 查看货源
内容描述: DS92LV1212A 16-40 MHz的10位总线LVDS随机锁定解串器与嵌入式时钟恢复 [DS92LV1212A 16-40 MHz 10-Bit Bus LVDS Random Lock Deserializer with Embedded Clock Recovery]
分类和应用: 线路驱动器或接收器驱动程序和接口接口集成电路光电二极管时钟
文件页数/大小: 17 页 / 375 K
品牌: TI [ TEXAS INSTRUMENTS ]
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DS92LV1212A
Absolute Maximum Ratings
(Note 1)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
Supply Voltage (V
CC
)
−0.3V to +4V
CMOS/TTL Input Voltage
−0.3V to (V
CC
+0.3V)
CMOS/TTL Output Voltage
−0.3V to (V
CC
+0.3V)
Bus LVDS Receiver Input
Voltage
−0.3V to +3.9V
Junction Temperature
+150˚C
Storage Temperature
−65˚C to +150˚C
Lead Temperature
(Soldering, 4 seconds)
+260˚C
Maximum Package Power Dissipation Capacity
@
25˚C Package:
28L SSOP
1.27 W
Package Derating:
28L SSOP
ESD Rating (HBM)
10.3mW/˚C above +25˚C
>
2kV
Recommended Operating
Conditions
Min
Supply Voltage (V
CC
)
Operating Free Air
Temperature (T
A
)
Receiver Input Range
Supply Noise Voltage
(V
CC
)
3.0
−40
0
Nom
3.3
+25
Max
3.6
+85
2.4
Units
V
˚C
V
100 mV
P-P
Electrical Characteristics
Over recommended operating supply and temperature ranges unless otherwise specified.
Symbol
Parameter
Conditions
Min
Typ
Max
Units
DESERIALIZER LVCMOS/LVTTL DC SPECIFICATIONS (apply to pins PWRDN, RCLK_R/ F, REN, REFCLK = inputs; apply to
pins ROUT, RCLK, LOCK = outputs)
V
IH
V
IL
V
CL
I
IN
V
OH
V
OL
I
OS
I
OZ
VTH
VTL
I
IN
High Level Input Voltage
Low Level Input Voltage
Input Clamp Voltage
Input Current
High Level Output Voltage
Low Level Output Voltage
Output Short Circuit Current
TRI-STATE Output Current
Differential Threshold High
Voltage
Differential Threshold Low
Voltage
Input Current
V
IN
= +2.4V, V
CC
= 3.6V or 0V
V
IN
= 0V, V
CC
= 3.6V or 0V
DESERIALIZER SUPPLY CURRENT (apply to pins DVCC and AVCC)
I
CCR
I
CCXR
Deserializer Supply Current
Worst Case
Deserializer Supply Current
Powerdown
C
L
= 15 pF
f = 40 MHz
f = 16 MHz
58
30
0.36
75
45
1.0
mA
mA
mA
I
CL
= −18 mA
V
IN
= 0V or 3.6V
I
OH
= −9 mA
I
OL
= 9 mA
VOUT = 0V
PWRDN or REN = 0.8V, V
OUT
= 0V or VCC
VCM = +1.1V
−10
2.1
GND
−15
−10
2.0
GND
−0.62
V
CC
0.8
−1.5
+15
V
CC
0.5
−85
+10
V
V
V
µA
V
V
mA
µA
±
2
2.93
0.33
−38
±
0.4
DESERIALIZER Bus LVDS DC SPECIFICATIONS (apply to pins RI+ and RI−)
+6
−50
−10
−10
−12
+50
mV
mV
+15
+10
µA
µA
±
1
±
0.05
Figure 1
PWRDN = 0.8V, REN = 0.8V
Deserializer Timing Requirements for REFCLK
Over recommended operating supply and temperature ranges unless otherwise specified.
Symbol
t
RFCP
t
RFDC
f
Ref
t
RFTT
Parameter
REFCLK Period
REFCLK Duty Cycle
REFCLK Frequency
REFCLK Transition Time
0.95/t
RCP
Conditions
Min
25
Typ
T
50
t
RCP
3
1.05/t
RCP
6
ns
Max
62.5
Units
ns
%
5
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