DS90CR285, DS90CR286
www.ti.com
SNLS130C –MARCH 1999–REVISED MARCH 2013
APPLICATIONS INFORMATION
The Channel Link devices are intended to be used in a wide variety of data transmission applications. Depending
upon the application the interconnecting media may vary. For example, for lower data rate (clock rate) and
shorter cable lengths (< 2m), the media electrical performance is less critical. For higher speed/long distance
applications the media's performance becomes more critical. Certain cable constructions provide tighter skew
(matched electrical length between the conductors and pairs). Twin-coax for example, has been demonstrated at
distances as great as 5 meters and with the maximum data transfer of 1.848 Gbit/s. Additional applications
information can be found in the following Interface Application Notes:
AN = ####
AN-1041
Topic
Introduction to Channel Link
(SNLA218)
AN-1108
(SNLA008)
Channel Link PCB and Interconnect Design-In
Guidelines
AN-806
Transmission Line Theory
(SNLA026)
AN-905
Transmission Line Calculations and Differential
(SNSNLA035L Impedance
A008)
AN-916
Cable Information
(SNLA219)
CABLES
A cable interface between the transmitter and receiver needs to support the differential LVDS pairs. The 21-bit
CHANNEL LINK chipset (DS90CR215/216) requires four pairs of signal wires and the 28-bit CHANNEL LINK
chipset (DS90CR285/286) requires five pairs of signal wires. The ideal cable/connector interface would have a
constant 100Ω differential impedance throughout the path. It is also recommended that cable skew remain below
150 ps (@ 66 MHz clock rate) to maintain a sufficient data sampling window at the receiver.
In addition to the four or five cable pairs that carry data and clock, it is recommended to provide at least one
additional conductor (or pair) which connects ground between the transmitter and receiver. This low impedance
ground provides a common mode return path for the two devices. Some of the more commonly used cable types
for point-to-point applications include flat ribbon, flex, twisted pair and Twin-Coax. All are available in a variety of
configurations and options. Flat ribbon cable, flex and twisted pair generally perform well in short point-to-point
applications while Twin-Coax is good for short and long applications. When using ribbon cable, it is
recommended to place a ground line between each differential pair to act as a barrier to noise coupling between
adjacent pairs. For Twin-Coax cable applications, it is recommended to utilize a shield on each cable pair. All
extended point-to-point applications should also employ an overall shield surrounding all cable pairs regardless
of the cable type. This overall shield results in improved transmission parameters such as faster attainable
speeds, longer distances between transmitter and receiver and reduced problems associated with EMS or EMI.
The high-speed transport of LVDS signals has been demonstrated on several types of cables with excellent
results. However, the best overall performance has been seen when using Twin-Coax cable. Twin-Coax has very
low cable skew and EMI due to its construction and double shielding. All of the design considerations discussed
here and listed in the supplemental application notes provide the subsystem communications designer with many
useful guidelines. It is recommended that the designer assess the tradeoffs of each application thoroughly to
arrive at a reliable and economical cable solution.
BOARD LAYOUT
To obtain the maximum benefit from the noise and EMI reductions of LVDS, attention should be paid to the
layout of differential lines. Lines of a differential pair should always be adjacent to eliminate noise interference
from other signals and take full advantage of the noise canceling of the differential signals. The board designer
should also try to maintain equal length on signal traces for a given differential pair. As with any high speed
design, the impedance discontinuities should be limited (reduce the numbers of vias and no 90 degree angles on
traces). Any discontinuities which do occur on one signal line should be mirrored in the other line of the
differential pair. Care should be taken to ensure that the differential trace impedance match the differential
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