SNLS094D – JUNE 1998 – REVISED APRIL 2013
Switching Characteristics
V
CC
= +5.0V ± 10%, T
A
=
−40°C
to +85°C, DS90C032T
(1) (2) (3) (4) (5)
Symbol
t
PHLD
t
PLHD
t
SKD
t
SK1
t
SK2
t
TLH
t
THL
t
PHZ
t
PLZ
t
PZH
t
PZL
(1)
(2)
(3)
(4)
(5)
Parameter
Differential Propagation Delay High to Low
Differential Propagation Delay Low to High
Differential Skew |t
PHLD
−
t
PLHD
|
Channel-to-Channel Skew
Chip to Chip Skew
Rise Time
Fall Time
Disable Time High to Z
Disable Time Low to Z
Enable Time Z to High
Enable Time Z to Low
R
L
= 2 kΩ,
C
L
= 10 pF,
See
and
(4)
(3)
Conditions
C
L
= 5 pF,
V
ID
= 200 mV,
See
and
Min
1.0
1.0
0
0
Typ
3.40
3.48
0.08
0.6
0.5
0.5
10
10
4
4
Max
6.0
6.0
1.2
1.5
5.0
2.5
2.5
20
20
15
15
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
All typical values are given for: V
CC
= +5.0V, T
A
= +25°C.
Generator waveform for all tests unless otherwise specified: f = 1 MHz, Z
O
= 50Ω, t
r
and t
f
(0%–100%)
≤
1 ns for R
IN
and t
r
and t
f
≤
6 ns
for EN or EN*.
Channel-to-Channel Skew is defined as the difference between the propagation delay of one channel and that of the others on the same
chip with an event on the inputs.
Chip to Chip Skew is defined as the difference between the minimum and maximum specified differential propagation delays.
C
L
includes probe and jig capacitance.
Switching Characteristics
V
CC
= +5.0V ± 10%, T
A
=
−55°C
to +125°C, DS90C032E
(1) (2) (3) (4) (5) (6)
Symbol
t
PHLD
t
PLHD
t
SKD
t
SK1
t
SK2
t
PHZ
t
PLZ
t
PZH
t
PZL
(1)
(2)
(3)
(4)
(5)
(6)
Parameter
Differential Propagation Delay High to Low
Differential Propagation Delay Low to High
Differential Skew |t
PHLD
−
t
PLHD
|
Channel-to-Channel Skew
Chip to Chip Skew
(4)
(3)
Conditions
C
L
= 20 pF,
V
ID
= 200 mV,
See
and
Min
1.0
1.0
0
0
Typ
3.40
3.48
0.08
0.6
10
10
4
4
Max
8.0
8.0
3.0
3.0
7.0
20
20
20
20
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
Disable Time High to Z
Disable Time Low to Z
Enable Time Z to High
Enable Time Z to Low
R
L
= 2 kΩ,
C
L
= 10 pF,
See
and
All typical values are given for: V
CC
= +5.0V, T
A
= +25°C.
Generator waveform for all tests unless otherwise specified: f = 1 MHz, Z
O
= 50Ω, t
r
and t
f
(0%–100%)
≤
1 ns for R
IN
and t
r
and t
f
≤
6 ns
for EN or EN*.
Channel-to-Channel Skew is defined as the difference between the propagation delay of one channel and that of the others on the same
chip with an event on the inputs.
Chip to Chip Skew is defined as the difference between the minimum and maximum specified differential propagation delays.
C
L
includes probe and jig capacitance.
For DS90C032E propagation delay measurements are from 0V on the input waveform to the 50% point on the output (ROUT).
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