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DS26C31TN/NOPB 参数 Datasheet PDF下载

DS26C31TN/NOPB图片预览
型号: DS26C31TN/NOPB
PDF下载: 下载PDF文件 查看货源
内容描述: DS26C31T / DS26C31M CMOS四路TRI- STATE®差动线路驱动器 [DS26C31T/DS26C31M CMOS Quad TRI-STATE® Differential Line Driver]
分类和应用: 驱动器
文件页数/大小: 19 页 / 1171 K
品牌: TI [ TEXAS INSTRUMENTS ]
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SNLS375B – JUNE 1998 – REVISED APRIL 2013
Switching Characteristics (continued)
V
CC
= 5V ±10%, t
r
6 ns, t
f
6 ns (Figure
Symbol
t
PHZ
t
PLZ
C
PD
C
IN
(3)
(4)
Parameter
Output Disable Time
(3)
Conditions
S1 Closed
S1 Closed
(4)
Min
Typ
DS26C31T
5
7
50
6
9
11
Max
CS26C31M
12
14
Units
ns
ns
pF
pF
Output Disable Time
(3)
Power Dissipation Capacitance
Input Capacitance
Output disable time is the delay from ENABLE or ENABLE being switched to the output transistors turning off. The actual disable times
are less than indicated due to the delay added by the RC time constant of the load.
C
PD
determines the no load dynamic power consumption, P
D
= C
PD
V
CC
2 f + I
CC
V
CC
, and the no load dynamic current consumption, I
S
= C
PD
V
CC
f + I
CC
.
Comparison Table of Switching Characteristics into “LS-Type” Load
V
CC
= 5V, T
A
= 25°C, t
r
6 ns, t
f
6 ns (Figure
Symbol
t
PLH
, t
PHL
Parameter
Propagation Delays Input to Output
Conditions
C
L
= 30 pF
S1 Closed
S2 Closed
Skew
See
(2)
(1)
DS26C31T
Typ
6
Max
8
DS26LS31C
Typ
10
Max
15
Units
ns
C
L
= 30 pF
S1 Closed
S2 Closed
0.5
1.0
2.0
6.0
ns
t
THL
, t
TLH
Differential Output Rise and Fall
Times
C
L
= 30 pF
S1 Closed
S2 Closed
C
L
= 10 pF
S1 Closed
S2 Open
6
9
15
35
ns
4
6
ns
t
PLZ
Output Disable Time
(3)
t
PHZ
Output Disable Time
(3)
C
L
= 10 pF
S1 Open
S2 Closed
4
7
15
25
ns
t
PZL
Output Enable Time
C
L
= 30 pF
S1 Closed
S2 Open
14
20
20
30
ns
t
PZH
Output Enable Time
C
L
= 30 pF
S1 Open
S2 Closed
11
17
20
30
ns
(1)
(2)
(3)
This table is provided for comparison purposes only. The values in this table for the DS26C31 reflect the performance of the device but
are not tested or verified.
Skew is defined as the difference in propagation delays between complementary outputs at the 50% point.
Output disable time is the delay from ENABLE or ENABLE being switched to the output transistors turning off. The actual disable times
are less than indicated due to the delay added by the RC time constant of the load.
Copyright © 1998–2013, Texas Instruments Incorporated
5
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