8.2.11 10 Mb/s MII Transmit Timing
T2.11.1
T2.11.1
TX_CLK
T2.11.2
T2.11.3
TXD[3:0]
TX_EN
Valid Data
Parameter
T2.11.1
Description
TX_CLK High/Low Time
Notes
Min Typ Max Units
10 Mb/s MII mode
10 Mb/s MII mode
10 Mb/s MII mode
190 200 210
ns
ns
ns
T2.11.2
TXD[3:0], TX_EN Data Setup to TX_CLK fall
TXD[3:0], TX_EN Data Hold from TX_CLK rise
25
0
T2.11.3
Note: An attached Mac should drive the transmit signals using the positive edge of TX_CLK. As shown above, the MII
signals are sampled on the falling edge of TX_CLK.
8.2.12 10 Mb/s MII Receive Timing
T2.12.1
T2.12.1
RX_CLK
T2.12.3
T2.12.2
RXD[3:0]
RX_DV
Valid Data
Parameter
T2.12.1
Description
Notes
Min Typ Max Units
RX_CLK High/Low Time
160 200
100
240
ns
ns
ns
T2.12.2
RX_CLK to RXD[3:0], RX_DV Delay
10 Mb/s MII mode
10 Mb/s MII mode
T2.12.3
RX_CLK rising edge delay from RXD[3:0],
RX_DV Valid
100
Note: RX_CLK may be held low for a longer period of time during transition between reference and recovered clocks.
Minimum high and low times will not be violated.
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