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DP83848IVVX 参数 Datasheet PDF下载

DP83848IVVX图片预览
型号: DP83848IVVX
PDF下载: 下载PDF文件 查看货源
内容描述: DP83848I PHYTER工业温度单端口10/100 Mb / s以太网物理层收发器 [DP83848I PHYTER Industrial Temperature Single Port 10/100 Mb/s Ethernet Physical Layer Transceiver]
分类和应用: 以太网局域网(LAN)标准
文件页数/大小: 86 页 / 788 K
品牌: TI [ TEXAS INSTRUMENTS ]
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The PHY Identifier Registers #1 and #2 together form a unique identifier for the DP83848I. The Identifier consists of a  
concatenation of the Organizationally Unique Identifier (OUI), the vendor's model number and the model revision num-  
ber. A PHY may return a value of zero in each of the 32 bits of the PHY Identifier if desired. The PHY Identifier is  
intended to support network management. National's IEEE assigned OUI is 080017h.  
7.1.3 PHY Identifier Register #1 (PHYIDR1)  
Table 14. PHY Identifier Register #1 (PHYIDR1), address 0x02  
Bit  
Bit Name  
Default  
Description  
15:0  
OUI_MSB  
<0010 0000 0000 OUI Most Significant Bits: Bits 3 to 18 of the OUI (080017h) are  
0000>, RO/P  
stored in bits 15 to 0 of this register. The most significant two bits  
of the OUI are ignored (the IEEE standard refers to these as bits 1  
and 2).  
7.1.4 PHY Identifier Register #2 (PHYIDR2)  
Table 15. PHY Identifier Register #2 (PHYIDR2), address 0x03  
Bit  
Bit Name  
Default  
<0101 11>, RO/P OUI Least Significant Bits:  
Bits 19 to 24 of the OUI (080017h) are mapped from bits 15 to 10  
Description  
15:10  
OUI_LSB  
of this register respectively.  
9:4  
3:0  
VNDR_MDL  
MDL_REV  
<00 1001>, RO/P Vendor Model Number:  
The six bits of vendor model number are mapped from bits 9 to 4  
(most significant bit to bit 9).  
<0000>, RO/P  
Model Revision Number:  
Four bits of the vendor model revision number are mapped from  
bits 3 to 0 (most significant bit to bit 3). This field will be incremented  
for all major device changes.  
7.1.5 Auto-Negotiation Advertisement Register (ANAR)  
This register contains the advertised abilities of this device as they will be transmitted to its link partner during Auto-  
Negotiation.  
Table 16. Negotiation Advertisement Register (ANAR), address 0x04  
Bit  
Bit Name  
Default  
Description  
15  
NP  
0, RW  
Next Page Indication:  
0 = Next Page Transfer not desired.  
1 = Next Page Transfer desired.  
14  
13  
RESERVED  
RF  
0, RO/P  
0, RW  
RESERVED by IEEE: Writes ignored, Read as 0.  
Remote Fault:  
1 = Advertises that this device has detected a Remote Fault.  
0 = No Remote Fault detected.  
12  
RESERVED  
0, RW  
RESERVED for Future IEEE use: Write as 0, Read as 0  
45  
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