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DP83840AVCE 参数 Datasheet PDF下载

DP83840AVCE图片预览
型号: DP83840AVCE
PDF下载: 下载PDF文件 查看货源
内容描述: 10/100 Mb / s的以太网物理层 [10/100 Mb/s Ethernet Physical Layer]
分类和应用: 电信集成电路电信电路信息通信管理以太网局域网(LAN)标准
文件页数/大小: 91 页 / 682 K
品牌: TI [ TEXAS INSTRUMENTS ]
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8.0 Electrical Specifications (Continued)  
8.9 Reset Timing  
8.9.1 Hardware Reset Timing  
Parameter  
Description  
Notes  
Min  
500  
1
Typ Max Units  
T1  
T2  
T3  
Internal Reset Time  
µs  
µs  
µs  
Hardware RESET Pulse Width  
Post Reset Stabilization time  
prior to MDC preamble for  
register accesses  
MDIO is pulled high for 32 bit serial  
management initialization  
500  
T4  
T5  
Hardware Configuration Latch- Hardware Configuration Pins are  
in Time from the Deassertion of described in section 3.10  
Reset (either soft or hard)  
800  
800  
ns  
ns  
Hardware Configuration pins  
transition to output drivers  
It is important to choose pull-up and/or  
pull-down resistors for each of the  
hardware configuration pins that provide  
fast RC time constants in order to latch-in  
the proper value prior to the pn  
transitioning to an output drive
Note: Software Reset should be initiated no sooner then 500µs after power-up or the deassertion of harde reset.  
Note: The timing for Hardware Reset Option 2 is equal to parameter T1 plus parameter T2 (501µs total).  
Vcc  
T2  
T3  
T1  
Hardware  
Reset (option #1)  
R
32 clocks  
MDC  
T4  
Latch-In of Hardware  
Configuration Pins  
T5  
input  
output  
Dual Function Pins  
Become Enabled As Outputs  
Version A  
86  
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