欢迎访问ic37.com |
会员登录 免费注册
发布采购

DAC7613E 参数 Datasheet PDF下载

DAC7613E图片预览
型号: DAC7613E
PDF下载: 下载PDF文件 查看货源
内容描述: 12位电压输出数位类比转换器 [12-Bit, Voltage Output DIGITAL-TO-ANALOG CONVERTER]
分类和应用: 转换器数模转换器光电二极管
文件页数/大小: 13 页 / 746 K
品牌: TI [ TEXAS INSTRUMENTS ]
 浏览型号DAC7613E的Datasheet PDF文件第4页浏览型号DAC7613E的Datasheet PDF文件第5页浏览型号DAC7613E的Datasheet PDF文件第6页浏览型号DAC7613E的Datasheet PDF文件第7页浏览型号DAC7613E的Datasheet PDF文件第9页浏览型号DAC7613E的Datasheet PDF文件第10页浏览型号DAC7613E的Datasheet PDF文件第11页浏览型号DAC7613E的Datasheet PDF文件第12页  
ANALOG OUTPUTS  
The current into the VREFH input depends on the DAC output  
voltages and can vary from a few microamps to approxi-  
mately 0.1 milliamp. The VREFH source will not be required  
to sink current, only source it. Bypassing the reference  
voltage or voltages with at least a 0.1µF capacitor placed as  
close to the DAC7613 package is strongly recommended.  
When VSS = –5V (dual supply operation), the output ampli-  
fier can swing to within 2.25V of the supply rails, guaran-  
teed over the –40°C to +85°C temperature range. With  
VSS = 0V (single-supply operation), the output can swing to  
ground. Note that the settling time of the output op amp will  
be longer with voltages very near ground. Additionally, care  
must be taken when measuring the zero-scale error when  
VSS = 0V. Since the output voltage cannot swing below  
ground, the output voltage may not change for the first few  
digital input codes (000H, 001H, 002H, etc.) if the output  
amplifier has a negative offset.  
DIGITAL INTERFACE  
Table I shows the basic control logic for the DAC7613. Note  
that the internal register is level triggered and not edge  
triggered. When the appropriate signal is LOW, the register  
becomes transparent. When this signal is returned HIGH, the  
digital word currently in the register is latched. The first  
register (the input register) is triggered via the R/W, and CS  
inputs. The second register (the DAC register) is transparent  
when LOADDAC input is pulled LOW.  
The behavior of the output amplifier can be critical in some  
applications. Under short-circuit conditions (DAC output  
shorted to ground), the output amplifier can sink a great deal  
more current than it can source. See the Specifications table  
for more details concerning short-circuit current.  
The double-buffered architecture is mainly designed so that  
the DAC input register can be written at any time and then  
the DAC voltage updated by pulling LOADDAC LOW.  
REFERENCE INPUTS  
The reference inputs, VREFL and VREFH, can be any voltage  
between VSS + 2.25V and VDD – 2.25V provided that VREFH  
is at least 1.25V greater than VREFL. The minimum output of  
each DAC is equal to VREFL plus a small offset voltage  
(essentially, the offset of the output op amp). The maximum  
output is equal to VREFH plus a similar offset voltage. Note  
that VSS (the negative power supply) must either be  
connected to ground or must be in the range of –4.75V to  
–5.25V. The voltage on VSS sets several bias points within  
the converter. If VSS is not in one of these two configura-  
tions, the bias values may be in error and proper operation  
of the device is not guaranteed.  
INPUT  
REGISTER  
DAC  
REGISTER  
R/W  
CS  
RST LOADDAC  
MODE  
L
L
L
L
H
H
H
H
H
L
L
H
H
L
Write  
Write  
Read  
Hold  
Hold  
Hold  
Write  
Hold  
Write  
Write Input  
Read Input  
Update  
H
X
X
X
L
Hold  
H
H
H
Update  
Hold  
H
X
Hold  
Reset  
Reset  
X = Don’t Care.  
TABLE I. DAC7613 Control Logic Truth Table.  
®
8
DAC7613