DAC712
www.ti.com ................................................................................................................................................. SBAS023A–SEPTEMBER 2000–REVISED JULY 2009
ELECTRICAL CHARACTERISTICS: DAC712P, U, PB, UB
At TA = +25°C, +VCC = +12V and +15V, and –VCC = –12V and –15V, unless otherwise noted.
DAC712P, U
TYP
DAC712PB, UB(1)
TEST
CONDITIONS
PARAMETER
MIN
MAX
MIN TYP
MAX
UNIT
INPUT
RESOLUTION
Resolution
16
Bits
DIGITAL INPUTS
Input Code
Binary Twos Complement
Logic Levels(2)
VIH
+2.0
+VCC – 1.4
+0.8
V
V
VIL
0
IIH (VI = +2.7V)
IIL (VI = +0.4V)
TRANSFER CHARACTERISTICS
ACCURACY
±10
µA
µA
±10
Linearity Error
TMIN to TMAX
±4
±8
±4
±8
±2
±4
±2
±4
LSB
LSB
Differential Linearity Error
TMIN to TMAX
LSB
LSB
Monotonicity Over Temperature
Gain Error(3)
13
14
Bits
±0.1
±0.2
±0.1
±20
%
%
TMIN to TMAX
Bipolar Zero Error(3)
±0.15
% FSR(4)
mV
TMIN to TMAX
±0.2
±40
±0.15
±30
% FSR
mV
±0.003
±30
% FSR/% VCC
ppm FSR/% VCC
Power-Supply Sensitivity of Full-Scale
DYNAMIC PERFORMANCE
Settling Time (to ±0.003%FSR, 5kΩ || 500pF Load)(5)
20V Output Step
1LSB Output Step(6)
6
4
10
µs
µs
Output Slew Rate
10
V/µs
Total Harmonic Distortion + Noise
0dB, 1001Hz, fS = 100kHz
–20dB, 1001Hz, fS = 100kHz
–60dB, 1001Hz, fS = 100kHz
SINAD
0.005
0.03
3.0
%
%
%
1001Hz, fS = 100kHz
Digital Feedthrough(6)
87
2
dB
nV-s
Digital-to-Analog Glitch Impulse(6)
15
120
nV-s
Output Noise Voltage (Includes Reference)
nV/√Hz
(1) Shaded cells indicate same specification as the DAC712P, U grade.
(2) Digital inputs are TTL- and +5V CMOS-compatible over the specified temperature range.
(3) Errors externally adjustable to zero.
(4) FSR means Full-Scale Range. For example, for a ±10V output, FSR = 20V.
(5) Maximum represents the 3σ limit. Not 100% tested for this parameter.
(6) For the worst-case code changes: FFFFh to 0000h and 0000h to FFFFh. These are binary twos complement (BTC) codes.
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