CC2640R2L
ZHCSRK4A –APRIL 2020 –REVISED SEPTEMBER 2020
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9.3 Main CPU
The SimpleLink™ CC2640R2L Wireless MCU contains an Arm Cortex-M3 (CM3) 32-bit CPU, which runs the
application and the higher layers of the protocol stack.
The CM3 processor provides a high-performance, low-cost platform that meets the system requirements of
minimal memory implementation, and low-power consumption, while delivering outstanding computational
performance and exceptional system response to interrupts.
Arm Cortex-M3 features include:
• 32-bit Arm Cortex-M3 architecture optimized for small-footprint embedded applications
• Outstanding processing performance combined with fast interrupt handling
• Arm Thumb®-2 mixed 16- and 32-bit instruction set delivers the high performance expected of a 32-bit Arm
core in a compact memory size usually associated with 8- and 16-bit devices, typically in the range of a few
kilobytes of memory for microcontroller-class applications:
– Single-cycle multiply instruction and hardware divide
– Atomic bit manipulation (bit-banding), delivering maximum memory use and streamlined peripheral control
– Unaligned data access, enabling data to be efficiently packed into memory
• Fast code execution permits slower processor clock or increases sleep mode time
• Harvard architecture characterized by separate buses for instruction and data
• Efficient processor core, system, and memories
• Hardware division and fast digital-signal-processing oriented multiply accumulate
• Saturating arithmetic for signal processing
• Deterministic, high-performance interrupt handling for time-critical applications
• Enhanced system debug with extensive breakpoint and trace capabilities
• Serial wire trace reduces the number of pins required for debugging and tracing
• Migration from the ARM7™ processor family for better performance and power efficiency
• Optimized for single-cycle flash memory use
• Ultra-low-power consumption with integrated sleep modes
• 1.25 DMIPS per MHz
9.4 RF Core
The RF Core contains an Arm Cortex-M0 processor that interfaces the analog RF and base-band circuits,
handles data to and from the system side, and assembles the information bits in a given packet structure. The
RF core offers a high level, command-based API to the main CPU.
The RF core is capable of autonomously handling the time-critical aspects of the radio protocols (Bluetooth low
energy) thus offloading the main CPU and leaving more resources for the user application.
The RF core has a dedicated 4-KB SRAM block and runs initially from separate ROM memory. The Arm Cortex-
M0 processor is not programmable by customers.
9.5 Memory
The Flash memory provides nonvolatile storage for code and data. The Flash memory is in-system
programmable.
The SRAM (static RAM) can be used for both storage of data and execution of code and is split into two 4-KB
blocks and two 6-KB blocks. Retention of the RAM contents in standby mode can be enabled or disabled
individually for each block to minimize power consumption. In addition, if flash cache is disabled, the 8-KB cache
can be used as a general-purpose RAM.
The ROM provides preprogrammed embedded TI-RTOS kernel, Driverlib, and lower layer protocol stack
software (Bluetooth low energy controller). It also contains a bootloader that can be used to reprogram the
device using SPI or UART. For CC2640R2Lxxx devices, the ROM contains Bluetooth 4.2 low energy host- and
controller software libraries, leaving more of the flash memory available for the customer application.
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