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CC1000PWR 参数 Datasheet PDF下载

CC1000PWR图片预览
型号: CC1000PWR
PDF下载: 下载PDF文件 查看货源
内容描述: 单芯片超低功耗RF收发器 [Single Chip Very Low Power RF Transceiver]
分类和应用: 电信集成电路蜂窝电话电路电信电路光电二极管
文件页数/大小: 55 页 / 594 K
品牌: TI [ TEXAS INSTRUMENTS ]
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CC1000  
Parameter  
Min.  
Typ.  
Max.  
Unit Condition / Note  
Frequency Synthesiser  
Section  
Crystal Oscillator Frequency  
3
16  
MHz  
ppm  
Crystal frequency can be 3-4, 6-8  
or 9-16 MHz. Recommended  
frequencies are 3.6864, 7.3728,  
11.0592 and 14.7456. See page  
35 for details.  
Crystal frequency accuracy  
requirement  
433 MHz  
868 MHz  
± 50  
± 25  
The crystal frequency accuracy  
and drift (ageing and  
temperature dependency) will  
determine the frequency accuracy  
of the transmitted signal.  
Crystal operation  
Parallel  
C171 and C181 are loading  
capacitors, see page 35  
Crystal load capacitance  
12  
12  
12  
22  
16  
16  
30  
30  
16  
pF  
pF  
pF  
3-4 MHz, 22 pF recommended  
6-8 MHz, 16 pF recommended  
9-16 MHz, 16 pF recommended  
Crystal oscillator start-up time  
5
1.5  
2
ms  
ms  
ms  
3.6864 MHz, 16 pF load  
7.3728 MHz, 16 pF load  
16 MHz, 16 pF load  
Output signal phase noise  
-85  
dBc/Hz At 100 kHz offset from carrier  
PLL lock time (RX / TX turn time)  
200  
Up to 1 MHz frequency step  
Crystal oscillator running  
µs  
µs  
PLL turn-on time, crystal oscillator  
on in power down mode  
250  
Digital Inputs/Outputs  
Logic “0” input voltage  
Logic ”1” input voltage  
Logic “0” output voltage  
0
0.7*VDD  
0
0.3*VDD  
VDD  
V
V
V
0.4  
Output current -2.5 mA,  
3.0 V supply voltage  
Logic “1” output voltage  
Logic “0” input current  
2.5  
NA  
VDD  
-1  
V
Output current 2.5 mA,  
3.0 V supply voltage  
Input signal equals GND  
Input signal equals VDD  
µA  
Logic “1” input current  
DIO setup time  
NA  
20  
1
µA  
ns  
TX mode, minimum time DIO  
must be ready before the positive  
edge of DCLK  
DIO hold time  
10  
ns  
TX mode, minimum time DIO  
must be held after the positive  
edge of DCLK  
Serial interface (PCLK, PDATA and  
PALE) timing specification  
See Table 2 page 14  
Current Consumption  
Power Down mode  
0.2  
1
Oscillator core off  
µA  
SWRS048A  
Page 6 of 55