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BQ76925 参数 Datasheet PDF下载

BQ76925图片预览
型号: BQ76925
PDF下载: 下载PDF文件 查看货源
内容描述: 主机控制模拟前端用于3至6节锂离子/聚合物电池 [Host Controlled Analog Front End for 3 to 6 Series Cell Lithium-Ion/ Polymer Battery]
分类和应用: 电池
文件页数/大小: 29 页 / 742 K
品牌: TI [ TEXAS INSTRUMENTS ]
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bq76925  
www.ti.com  
SLUSAM9A JULY 2011REVISED JULY 2011  
VC4_CAL  
Address  
Name  
Type  
D7  
D6  
D5  
D4  
D3  
D2  
D1  
D0  
0x14  
VC4_CAL  
EEPROM  
VC4_OFFSET_CORR  
VC4_GAIN_CORR  
VC4_OFFSET_CORR : Lower 4 bits of offset correction factor for cell 4 translation. The complete offset  
correction factor is obtained by concatenating this value with the most significant bit VC4_OC_4, which is stored  
in the VC_CAL_EXT_2 register. The final value is a 5-bit signed 2s complement number in the range -16 to +15  
with a value of 1 mV per lsb. See description of usage in OPERATIONAL OVERVIEW.  
VC4_GAIN_CORR : Lower 4 bits of gain correction factor for cell 4 translation. The complete gain correction  
factor is obtained by concatenating this value with the most significant bit VC4_GC_4, which is stored in the  
VC_CAL_EXT_2 register. The final value is a 5-bit signed 2s complement number in the range -16 to +15 with a  
value of 0.1% per lsb. See description of usage in OPERATIONAL OVERVIEW.  
VC5_CAL  
Address  
Name  
Type  
D7  
D6  
D5  
D4  
D3  
D2  
D1  
D0  
0x15  
VC5_CAL  
EEPROM  
VC5_OFFSET_CORR  
VC5_GAIN_CORR  
VC5_OFFSET_CORR : Lower 4 bits of offset correction factor for cell 5 translation. The complete offset  
correction factor is obtained by concatenating this value with the most significant bit VC5_OC_4, which is stored  
in the VC_CAL_EXT_2 register. The final value is a 5-bit signed 2s complement number in the range -16 to +15  
with a value of 1 mV per lsb. See description of usage in OPERATIONAL OVERVIEW.  
VC5_GAIN_CORR : Lower 4 bits of gain correction factor for cell 5 translation. The complete gain correction  
factor is obtained by concatenating this value with the most significant bit VC5_GC_4, which is stored in the  
VC_CAL_EXT_2 register. The final value is a 5-bit signed 2s complement number in the range -16 to +15 with a  
value of 0.1% per lsb. See description of usage in OPERATIONAL OVERVIEW.  
VC6_CAL  
Address  
Name  
Type  
D7  
D6  
D5  
D4  
D3  
D2  
D1  
D0  
0x16  
VC6_CAL  
EEPROM  
VC6_OFFSET_CORR  
VC6_GAIN_CORR  
VC6_OFFSET_CORR : Lower 4 bits of offset correction factor for cell 6 translation. The complete offset  
correction factor is obtained by concatenating this value with the most significant bit VC6_OC_4, which is stored  
in the VC_CAL_EXT_2 register. The final value is a 5-bit signed 2s complement number in the range -16 to +15  
with a value of 1 mV per lsb. See description of usage in OPERATIONAL OVERVIEW.  
VC6_GAIN_CORR : Lower 4 bits of gain correction factor for cell 6 translation. The complete gain correction  
factor is obtained by concatenating this value with the most significant bit VC6_GC_4, which is stored in the  
VC_CAL_EXT_2 register. The final value is a 5-bit signed 2s complement number in the range -16 to +15 with a  
value of 0.1% per lsb. See description of usage in OPERATIONAL OVERVIEW.  
VC_CAL_EXT_1  
Address  
Name  
Type  
D7  
D6  
D5  
D4  
D3  
D2  
D1  
D0  
0x17  
VC_CAL_EXT_1  
EEPROM  
VC1_OC_4  
VC1_GC_4  
VC2_OC_4  
VC2_GC_4  
VC1_OC_4 : Most significant bit of offset correction factor for cell 1 translation. See VC1_CAL register  
description for details.  
VC1_GC_4 : Most significant bit of gain correction factor for cell 1 translation. See VC1_CAL register description  
for details.  
VC2_OC_4 : Most significant bit of offset correction factor for cell 2 translation. See VC2_CAL register  
description for details.  
VC2_GC_4 : Most significant bit of gain correction factor for cell 2 translation. See VC2_CAL register description  
for details.  
Copyright © 2011, Texas Instruments Incorporated  
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