ꢀ
ꢁ
ꢂ
ꢃ
ꢄ
ꢅ
ꢂ
ꢆ
ꢀ
ꢁ
ꢂ
ꢃ
ꢄ
ꢅ
ꢇ
SLUS553D − MAY 2003 − REVISED JULY 2005
ELECTRICAL CHARACTERISTICS
(−40°C ≤ T ≤ 125°C, 7.0 V
≤ VCC ≤ 28 V , all voltages relative to V ) (unless otherwise specified)
DC DC ss
J
Quiescent Current
PARAMETER
TEST CONDITIONS
MIN
TYP
1.6
22
MAX
6
UNIT
mA
I
I
)
Total chip operating current
ACPRES = High EN = 0
,
1
DD(OP
Total battery sleep current, ac not present
ACPRES = Low
28
µA
DD(SLEEP)
logic interface dc characteristics
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
0.4
UNIT
V
V
V
V
Low-level output voltage (ACPRES, ALARM)
Low-level input voltage (ACSEL, ENABLE)
High-level input voltage (ACSEL, ENABLE)
Sink current (ACPRES)
I
= 1 mA
OL
OL
0.6
V
IL
1.8
1.5
1.5
V
IH
I
V
V
= 0.4
= 0.4
2
2
2.5
2.5
mA
mA
(SINK1)
(SINK2)
OL
I
Sink current (ALARM)
OL
PWM Oscillator
PARAMETER
TEST CONDITIONS
0°C ≤ T ≤ 85°C
MIN
260
TYP
300
300
MAX
340
UNIT
J
f
Oscillator frequency
kHz
OSC(PWM)
−40°C ≤ T ≤ 125°C
240
350
J
Maximum duty cycle
100%
3.8
Input voltage for maximum dc (COMP)
Minimum duty cycle
V
0%
0.8
Input voltage for minimum dc (COMP)
Oscillator ramp voltage (peak-to-peak)
V
V
1.85
2.15
3.8
2.30
(RAMP)
IK(COMP)
S(COMP)
V
Internal input clamp voltage
(tracks COMP voltage for maximum dc)
4.5
I
Internal source current (COMP)
Error amplifier = OFF, V
= 1 V
70
110
140
µA
(COMP)
Leakage Current
PARAMETER
TEST CONDITIONS
= 5 V
MIN
TYP
MAX
0.2
0.2
0.2
0.2
0.2
0.2
0.2
0.2
0.2
0.2
0.2
UNIT
µA
µA
µA
µA
µA
µA
µA
µA
µA
µA
µA
I
I
I
I
I
I
I
I
I
I
I
Leakage current, ACDET
Leakage current, SRSET
Leakage current, ACSET
Leakage current, BATDEP
Leakage current, VS
V
V
V
V
V
V
V
V
V
V
V
L(ACDET)
L(SRSET)
L(ACSET)
L(BATDEP)
L(VS)
(ACDET)
(SRSET)
(ACSET)
(BATDEP)
= 2.5 V
= 2.5 V
= 5 V
= 5 V
(VS)
Leakage current, ALARM
Leakage current, ACSEL
Leakage current, ENABLE
Leakage current, ACPRES
Leakage current, BATP
Leakage current, BATSET
= 5 V
= 5 V
L(ALARM)
L(ACSEL)
L(ENABLE)
L(ACPRES)
L(BATP)
(ALARM)
(ACSEL)
(ENABLE)
(ACPRES)
= 5 V
= 5 V
= 5 V
(BATP)
= 2.5 V
L(BATSET)
(BATSET)
5
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