bq24170
bq24172
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SLUSAD2A –NOVEMBER 2010–REVISED NOVEMBER 2010
sources connected together to CMSRC. The n-channel FET with the drain connected to the ACP (Q2, RBFET)
provides reverse battery discharge protection, and minimizes system power dissipation with its low-RDSON. The
other n-channel FET with drain connected to adapter input (Q1, ACFET) separates battery from adapter, and
provides a limited dI/dt when connecting the adapter to the system by controlling the FET turn-on time. The
/BATDRV controls a p-channel power MOSFET (Q3, BATFET) placed between battery and system with drain
connected to battery.
Before the adapter is detected, the ACDRV is pulled to CMSRC to keep ACFET off, disconnecting the adapter
from system. /BATDRV stays at ACN-6V (clamp to ground) to connect battery to system if all the following
conditions are valid:
•
•
VAVCC > VUVLO (battery supplies AVCC)
VACN < VSRN + 200 mV
After the device comes out of SLEEP mode, the system begins to switch from battery to adapter. The AVCC
voltage has to be 300mV above SRN to enable the transition. The break-before-make logic keeps both ACFET
and BATFET off for 10us before ACFET turns on. This prevents shoot-through current or any large discharging
current from going into the battery. The /BATDRV is pulled up to ACN and the ACDRV pin is set to CMSRC + 6V
by an internal charge pump to turn on n-channel ACFET, connecting the adapter to the system if all the following
conditions are valid:
•
•
VACUV < VOVPSET < VACOV
VAVCC > VSRN + 300 mV
When the adapter is removed, the IC turns off ACFET and enters SLEEP mode.
BATFET keeps off until the system drops close to SRN. The BATDRV pin is driven to ACN - 6V by an internal
regulator to turn on p-channel BATFET, connecting the battery to the system.
Asymmetrical gate drive provides fast turn-off and slow turn-on of the ACFET and BATFET to help the
break-before-make logic and to allow a soft-start at turn–on of both MOSFETs. The delay time can be further
increased, by putting a capacitor from gate to source of the power MOSFETs.
CONVERTER OPERATION
The bq24170/172 employs a 1.6MHz constant-frequency step-down switching regulator. The fixed frequency
oscillator keeps tight control of the switching frequency under all conditions of input voltage, battery voltage,
charge current, and temperature, simplifying output filter design and keeping it out of the audible noise region.
A type III compensation network allows using ceramic capacitors at the output of the converter. An internal
saw-tooth ramp is compared to the internal error control signal to vary the duty-cycle of the converter. The ramp
height is proportional to the AVCC voltage to cancel out any loop gain variation due to a change in input voltage,
and simplifies the loop compensation. Internal gate drive logic allows achieving 97% duty-cycle before pulse
skipping starts.
AUTOMATIC INTERNAL SOFT-START CHARGER CURRENT
The charger automatically soft-starts the charger regulation current every time the charger goes into fast-charge
to ensure there is no overshoot or stress on the output capacitors or the power converter. The soft-start consists
of stepping-up the charge regulation current into 8 evenly divided steps up to the programmed charge current.
Each step lasts around 1.6ms, for a typical rise time of 12.8ms. No external components are needed for this
function.
CHARGE OVER-CURRENT PROTECTION
The charger monitors top side MOSFET current by high side sense FET. When peak current exceeds MOSFET
limit, it will turn off the top side MOSFET and keep it off until the next cycle. The charger has a secondary
cycle-to-cycle over-current protection. It monitors the charge current, and prevents the current from exceeding
160% of the programmed charge current. The high-side gate drive turns off when either over-current condition is
detected, and automatically resumes when the current falls below the over-current threshold.
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