bq24030, bq24031, bq24032,
bq24032A, bq24035, bq24038, bq24039
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SLUS618C–AUGUST 2004–REVISED JUNE 2005
APPLICATION INFORMATION (continued)
PCB Layout Considerations
It is important to pay special attention to the PCB layout. The following provides some guidelines:
•
To obtain optimal performance, the decoupling capacitor from input terminals to VSS and the output filter
capacitors from OUT to VSS should be placed as close as possible to the bqTINY-II, with short trace runs to
both signal and VSS pins.
•
All low-current VSS connections should be kept separate from the high-current charge or discharge paths
from the battery. Use a single-point ground technique incorporating both the small signal ground path and the
power ground path.
•
•
The high-current charge paths into AC and USB and from the BAT and OUT pins must be sized
appropriately for the maximum charge current in order to avoid voltage drops in these traces.
The bqTINY-III is packaged in a thermally enhanced MLP package. The package includes a QFN thermal
pad to provide an effective thermal contact between the device and the printed-circuit board. Full PCB design
guidelines for this package are provided in the application note entitled QFN/SON PCB Attachment
(SLUA271).
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