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BQ24032ARHLR 参数 Datasheet PDF下载

BQ24032ARHLR图片预览
型号: BQ24032ARHLR
PDF下载: 下载PDF文件 查看货源
内容描述: 单片充电和系统电源路径管理IC ( bqTINYTM - III ) [SINGLE-CHIP CHARGE AND SYSTEM POWER-PATH MANAGEMENT IC(bqTINYTM-III)]
分类和应用: 电源电路电源管理电路PC
文件页数/大小: 32 页 / 853 K
品牌: TI [ TEXAS INSTRUMENTS ]
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bq24030, bq24031, bq24032,  
bq24032A, bq24035, bq24038, bq24039  
www.ti.com  
SLUS618CAUGUST 2004REVISED JUNE 2005  
Charge Termination and Recharge  
The bqTINY-III monitors the voltage on the ISET1 pin, during voltage regulation, to determine when termination  
should occur (C/10 – 250 mV, C/25 – 100 mV). Once the termination threshold, I(TERM), is detected the bqTINY-III  
terminates charge. The resistor connected between the ISET1 and VSS, RSET, programs the fast charge current  
level (C level, VISET1 = 2.5 V) and thus the C/10 and C/25 current termination threshold levels. The V(TERM) and  
K(SET) parameters are specified in the specifications table. Note that this applies to both AC and USB charging.  
V
K
(SET)  
(TERM)  
I
+
(TERM)  
R
SET  
(8)  
After charge termination, the bqTINY-III re-starts the charge once the voltage on the OUT pin falls below the  
V(RCH) threshold. This feature keeps the battery at full capacity at all times.  
LDO Regulator  
The bqTINY-III provides a 3.3-V LDO regulator. This regulator is typically used to power USB transceiver or  
drivers in portable applications. Note that this LDO is only enabled when either AC or USB inputs are present. If  
the CE pin is low (chip disabled) and AC or USB is present, the LDO is powered by the battery. This is to ensure  
low input current when the chip is disabled.  
Sleep and Standby Modes  
The bqTINY-III charger circuitry enters the low-power sleep mode if both AC and USB are removed from the  
circuit. This feature prevents draining the battery into the bqTINY-III during the absence of input supplies. Note  
that in sleep mode, Q2 remains on (i.e., battery connected to the OUT pin) in order for the battery to continue  
supplying power to the system.  
The bqTINY-III enters the low-power standby mode if while AC or USB is present, the CE input is low. In this  
suspend mode, internal power FETs Q1 and Q3 (see the block diagram) are turned off, the BAT input is used to  
power the system through OUT pin, and the LDO remains on (powered from output). This feature is designed to  
limit the power drawn from the input supplies (such as USB suspend mode).  
Charge Status Outputs  
The open-drain (OD) STAT1 and STAT2 outputs indicate various charger operations as shown in Table 2. These  
status pins can be used to drive LEDs or communicate to the host processor. Note that OFF indicates the  
open-drain transistor is turned off. Note that this assumes CE = High.  
Table 2. Status Pins Summary  
CHARGE STATE  
Precharge in progress  
STAT1  
ON  
STAT2  
ON  
Fast charge in progress  
ON  
OFF  
ON  
Charge done  
OFF  
OFF  
Charge suspend (temperature), timer fault, and sleep mode  
OFF  
ACPG, USBPG Outputs (Power Good), bq24030/1/2/2A/5/9  
The two open-drain pins, ACPG, USBPG (AC and USB power good), indicate when the AC adapter or USB port  
is present and above the battery voltage. The corresponding output turns ON (low) when exiting sleep mode  
(input voltage above battery voltage). This output is turned off in the sleep mode (open drain). The ACPG,  
USBPG pins can be used to drive an LED or communicate to the host processor. Note that OFF indicates the  
open-drain transistor is turned off.  
PG Output (Power Good), bq24038  
The open-drain pin PG indicates when either the AC adapter or USB port is present and above the battery  
voltage. This output is turned off in sleep mode (open drain). The PG pin can be used to drive a LED or  
communicate with the host processor.  
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