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SLUS618F – AUGUST 2004 – REVISED NOVEMBER 2006
ELECTRICAL CHARACTERISTICS (continued)
over junction temperature range (0°C
≤
T
J
≤
125°C) and the recommended supply voltage range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
STAT1, STAT2. ACPG AND USBPG, PG OPEN DRAIN (OD) OUTPUTS
(14)
V
OL
I
LKG
V
IL
V
IH
I
IL
I
IH
I
IL
I
IH
I
IL1
I
IH1
t
(CE-HLDOFF)
PSEL INPUT
V
IL
V
IH
I
IL
I
IH
TIMERS
K
(TMR)
R
(TMR)
(15)
Low-level output saturation
voltage
Input leakage current
I
OL
= 5 mA, An external pullup
resistor
≥
1 K required.
1
0.25
5
V
µA
ISET2, CE, VBSEL INPUTS
Low-level input voltage
High-level input voltage
Low-level input current, CE
High-level input current, CE
Low-level input current, ISET2
High-level input current, ISET2
Low-level input current
High-level input current
Holdoff time, CE
V
ISET2
= 0 V
V
ISET2
= V
CC
VBSEL = Low
VBSEL = High
CE going low only
4
6
–20
40
1
15
6
ms
0
1.4
–1
1
µA
0.4
V
Low-level input voltage
High-level input voltage
Low-level input current, PSEL
High-level input current, PSEL
Falling Hi→Low; 280 K ± 10% applied
when low.
Input R
PSEL
sets external hysteresis
0.975
V
IL
+ .01
–1
1
1.025
V
IL
+ .024
V
V
µA
µA
Timer set factor
External resistor limits
Precharge timer
Timer fault recovery pullup from
OUT to BAT
t
(CHG)
= K
(TMR)
× R
(TMR)
0.313
30
0.09 × t
(CHG)
0.360
0.414
100
s/Ω
kΩ
s
kΩ
t
(PRECHG)
I
(FAULT)
0.10 × t
(CHG)
0.11 × t
(CHG)
1
CHARGER SLEEP THRESHOLDS (ACPG , PG, and USBPG THRESHOLDS, LOW
→
POWER GOOD)
V
(SLPENT) (16)
Sleep-mode entry threshold
V
(UVLO)
≤
V
I(BAT)
≤
V
O(BAT-REG)
,
No t
(BOOT-UP)
delay
V
(UVLO)
≤
V
I(BAT)
≤
V
O(BAT-REG)
,
No t
(BOOT-UP)
delay
R
(TMR)
= 50 kΩ,
V
(AC)
or V
(USB)
or decreasing below
threshold, 100-ns fall time, 10-mv
overdrive
V
VCC
≥
V
I(BAT)
+190 mV
V
VCC
≤
V
I(BAT)
+125 mV
V
V
(SLPEXIT) (16)
Sleep-mode exit threshold
t
(DEGL)
Deglitch time for sleep mode
(17)
22.5
ms
START-UP CONTROL and USB BOOT-UP
t
(BOOT-UP)
Boot-up time
On the first application of USB input
power or AC input with PSEL Low
120
150
180
ms
(14)
(15)
(16)
(17)
See Charger Sleep mode for ACPG (V
CC
= V
AC
) and USBPG (V
CC
= V
USB
) specifications.
To disable the safety timer and charge termination, tie TMR to the LDO pin.
The IC is considered in sleep mode when both AC and USB are absent (ACPG = USBPG = OPEN DRAIN).
Does not declare sleep mode until after the deglitch time and implement the needed power transfer immediately according to the
switching specification.
7