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AM3352BZCZD80 参数 Datasheet PDF下载

AM3352BZCZD80图片预览
型号: AM3352BZCZD80
PDF下载: 下载PDF文件 查看货源
内容描述: 的Sitara AM335x ARM Cortex-A8的微处理器(MPU ) [Sitara AM335x ARM Cortex-A8 Microprocessors (MPUs)]
分类和应用: 微控制器和处理器外围集成电路微处理器时钟
文件页数/大小: 236 页 / 2887 K
品牌: TI [ TEXAS INSTRUMENTS ]
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AM3359, AM3358, AM3357  
AM3356, AM3354, AM3352  
www.ti.com  
SPRS717F OCTOBER 2011REVISED APRIL 2013  
Table 3-13. DC Electrical Characteristics Over Recommended Ranges of Supply Voltage and Operating  
Temperature (Unless Otherwise Noted) (continued)  
PARAMETER  
MIN  
NOM  
MAX UNIT  
DDR_RESETn,DDR_CSn0,DDR_CKE,DDR_CK,DDR_CKn,DDR_CASn,DDR_RASn,DDR_WEn,DDR_BA0,DDR_BA1,DDR_BA2,DDR_A  
0,DDR_A1,DDR_A2,DDR_A3,DDR_A4,DDR_A5,DDR_A6,DDR_A7,DDR_A8,DDR_A9,DDR_A10,DDR_A11,DDR_A12,DDR_A13,DDR_A  
14,DDR_A15,DDR_ODT,DDR_D0,DDR_D1,DDR_D2,DDR_D3,DDR_D4,DDR_D5,DDR_D6,DDR_D7,DDR_D8,DDR_D9,DDR_D10,DDR_  
D11,DDR_D12,DDR_D13,DDR_D14,DDR_D15,DDR_DQM0,DDR_DQM1,DDR_DQS0,DDR_DQSn0,DDR_DQS1,DDR_DQSn1 pins  
(DDR3, DDR3L - HSTL mode)  
VIH  
High-level input voltage  
VDDS_DDR =  
1.5 V  
DDR_VREF +  
0.1  
V
VDDS_DDR =  
1.35 V  
DDR_VREF +  
0.09  
VDDS_DDR =  
1.5 V  
DDR_VREF -  
0.1  
VIL  
Low-level input voltage  
V
VDDS_DDR =  
1.35 V  
DDR_VREF -  
0.09  
VHYS  
VOH  
Hysteresis voltage at an input  
NA  
V
V
High-level output voltage, driver enabled, pullup  
or pulldown disbaled  
IOH = 8 mA  
IOL = 8 mA  
VDDS_DDR -  
0.4  
VOL  
Low-level output voltage, driver enabled, pullup  
or pulldown disbaled  
0.4  
10  
V
Input leakage current, Receiver disabled, pullup or pulldown  
inhibited  
II  
µA  
µA  
Input leakage current, Receiver disabled, pullup enabled  
Input leakage current, Receiver disabled, pulldown enabled  
-240  
80  
-80  
240  
10  
IOZ  
Total leakage current through the terminal connection of a driver-  
receiver combination that may include a pullup or pulldown. The  
driver output is disabled and the pullup or pulldown is inhibited.  
ECAP0_IN_PWM0_OUT,UART0_CTSn,UART0_RTSn,UART0_RXD,UART0_TXD,UART1_CTSn,UART1_RTSn,UART1_RXD,UART1_T  
XD,I2C0_SDA,I2C0_SCL,XDMA_EVENT_INTR0,XDMA_EVENT_INTR1,WARMRSTn,PWRONRSTn,EXTINTn,TMS,TDO,USB0_DRVVB  
US,USB1_DRVVBUS (VDDSHV6 = 1.8 V)  
0.65 *  
VDDSHV6  
VIH  
VIL  
High-level input voltage  
V
V
0.35 *  
VDDSHV6  
Low-level input voltage  
VHYS  
VOH  
Hysteresis voltage at an input  
0.18  
0.305  
V
V
High-level output voltage, driver enabled, pullup  
or pulldown disbaled  
IOH = 4 mA  
IOL = 4 mA  
VDDSHV6 -  
0.45  
VOL  
Low-level output voltage, driver enabled, pullup  
or pulldown disbaled  
0.45  
8
V
Input leakage current, Receiver disabled, pullup or pulldown  
inhibited  
II  
µA  
µA  
Input leakage current, Receiver disabled, pullup enabled  
Input leakage current, Receiver disabled, pulldown enabled  
-161  
52  
-100  
100  
-52  
170  
8
IOZ  
Total leakage current through the terminal connection of a driver-  
receiver combination that may include a pullup or pulldown. The  
driver output is disabled and the pullup or pulldown is inhibited.  
Copyright © 2011–2013, Texas Instruments Incorporated  
Device Operating Conditions  
91  
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Product Folder Links: AM3359 AM3358 AM3357 AM3356 AM3354 AM3352  
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