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SPRS717F –OCTOBER 2011–REVISED APRIL 2013
Table 5-90. Switching Characteristics for MMC[x]_CMD and MMC[x]_DAT[7:0]—High-Speed Mode
(see Figure 5-95)
OPP100
TYP
OPP50
TYP
NO.
PARAMETER
UNIT
MIN
MAX
MIN
MAX
td(CLKL-
CMD)
Delay time, MMC_CLK rising clock edge to
MMC_CMD transition
12
2.5
14
2.5
17.5
ns
ns
Delay time, MMC_CLK rising clock edge to
MMC_DATx transition
13 td(CLKL-DAT)
2.5
14
2.5
17.5
12
MMC[x]_CLK (Output)
MMC[x]_CMD (Output)
MMC[x]_DAT[7:0] (Outputs)
13
Figure 5-95. MMC[x]_CMD and MMC[x]_DAT[7:0] Output Timing—High Speed Mode
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Peripheral Information and Timings
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