ADS8284
www.ti.com................................................................................................................................................................................................... SLAS628–MARCH 2009
PRINCIPLES OF OPERATION
The ADS8284 features a high-speed successive approximation register (SAR) analog-to-digital converter (ADC).
The architecture is based on charge redistribution which inherently includes a sample/hold function. See
Figure 72 for the application circuit for the ADS8284.
The conversion clock is generated internally. The conversion time of 650 ns is capable of sustaining a 1 MHz
throughput.
The analog input voltage to ADC is provided to two input pins AINP and AINM. When a conversion is initiated,
the differential input on these pins is sampled on the internal capacitor array. While a conversion is in progress,
both inputs are disconnected from any internal function.
REFERENCE
The ADS8284 can operate with an external reference with a range from 3.0 V to 4.2 V. The reference voltage on
the input pin 10 (REFIN) of the converter is internally buffered. A clean, low noise, well-decoupled reference
voltage on this pin is required to ensure good performance of the converter. A low noise band-gap reference like
the REF5040 can be used to drive this pin. A 0.1-µF decoupling capacitor is required between REFIN and REFM
pins (pin 10 and pin 9) of the converter. This capacitor should be placed as close as possible to the pins of the
device. Designers should strive to minimize the routing length of the traces that connect the terminals of the
capacitor to the pins of the converter. An RC network can also be used to filter the reference voltage. A 100-Ω
series resistor and a 0.1-µF capacitor, which can also serve as the decoupling capacitor can be used to filter the
reference voltage.
REFM
ADS8284
0.1 mF
100 W
REFIN
REF5040
Figure 74. ADS8284 Using External Reference
The ADS8284 also has limited low pass filtering capability built into the converter. The equivalent circuitry on the
REFIN input is as shown in Figure 75.
10 kW
REFIN
+
_
To CDAC
300 pF
830 pF
REFM
To CDAC
Figure 75. Simplified Reference Input Circuit
The REFM input of the ADS8284 should always be shorted to AGND. A 4.096-V internal reference is included.
When the internal reference is used, pin 11 (REFOUT) is connected to pin 10 (REFIN) with an 0.1-µF decoupling
capacitor and 1-µF storage capacitor between pin 11 (REFOUT) and pin 9 ( REFM) (see Figure 73). The internal
reference of the converter is double buffered. If an external reference is used, the second buffer provides
isolation between the external reference and the CDAC. This buffer is also used to recharge all of the capacitors
of the CDAC during conversion (see Figure 75). Pin 11 (REFOUT) can be left unconnected (floating) if external
reference is used.
Copyright © 2009, Texas Instruments Incorporated
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