SBAS456A – DECEMBER 2008 – REVISED OCTOBER 2009..........................................................................................................................................
www.ti.com
SWITCHING CHARACTERISTICS
(1)
PARAMETER
(2)
+V
DD
= 2.7 V, over operating free-air temperature range (unless otherwise noted) (see
TEST CONDITIONS
Standard mode
f
SCL
SCL clock frequency
Fast mode
High-speed mode
t
BUF
Bus free time between Stop and Start
conditions
Standard mode
Fast mode
Standard mode
t
HD; STA
Hold time (repeated) Start condition
Fast mode
High-speed mode
Standard mode
t
low
Low period of the SCL clock
Fast mode
High-speed mode
(3)
Standard mode
t
high
High period of the SCL clock
Fast mode
High-speed mode
(3)
Standard mode
t
SU; STA
Setup time for a repeated Start condition
Fast mode
High-speed mode
Standard mode
t
SU; DAT
Data setup time
Fast mode
High-speed mode
Standard mode
t
HD; DAT
Data hold time
Fast mode
High-speed mode
(3)
Standard mode
t
rCL
Rise time of SCL signal
Fast mode
High-speed mode
Standard mode
t
rCL1
Rise time of SCL signal after a repeated Start
condition and after an acknowledge bit
Fast mode
High-speed mode
(3)
Standard mode
t
fCL
Fall time of SCL signal
Fast mode
High-speed mode
(3)
Standard mode
t
rDA
Rise time of SDA signal
Fast mode
High-speed mode
(1)
(2)
(3)
(4)
8
(3)
(3)
(4)
MIN
MAX
100
400
UNIT
kHz
MHz
μs
μs
ns
μs
ns
μs
ns
μs
ns
C
b
= 100 pF max
C
b
= 400 pF max
4.7
1.3
4
600
160
4.7
1.3
C
b
= 100 pF max
C
b
= 400 pF max
160
320
4
600
C
b
= 100 pF max
C
b
= 400 pF max
60
120
4.7
600
160
250
100
10
0
0
C
b
= 100 pF max
C
b
= 400 pF max
0
0
20 + 0.1C
b
C
b
= 100 pF max
C
b
= 400 pF max
10
20
20 + 0.1C
b
C
b
= 100 pF max
C
b
= 400 pF max
10
20
20 + 0.1C
b
C
b
= 100 pF max
C
b
= 400 pF max
10
20
20 + 0.1C
b
C
b
= 100 pF max
C
b
= 400 pF max
10
20
3.4
1.7
ns
3.45
0.9
82
162
1000
300
40
80
1000
300
80
160
300
300
40
80
1000
300
80
160
ns
ns
ns
ns
μs
ns
All values referred to V
IH(MIN)
and V
IL(MAX)
levels.
Not production tested, except for the parameter t
HD; DAT
, data hold time, high-speed mode, C
b
= 100 pF max.
For bus line loads (C
B
) between 100 pF and 400 pF, the timing parameters must be linearly interpolated.
A device must internally provide a data hold time to bridge the undefined part between V
IH
and V
IL
of the falling edge of the SCLH
signal. An input circuit with a threshold as low as possible for the falling edge of the SCLH signal minimizes this hold time.
Product Folder Link(s):
Copyright © 2008–2009, Texas Instruments Incorporated
TI [ TEXAS INSTRUMENTS ]
