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ADS7828EBIPWRQ1 参数 Datasheet PDF下载

ADS7828EBIPWRQ1图片预览
型号: ADS7828EBIPWRQ1
PDF下载: 下载PDF文件 查看货源
内容描述: 12位8通道采样模拟数字转换器与I2Câ ?? ¢接口 [12-BIT 8-CHANNEL SAMPLING ANALOG-TO-DIGITAL CONVERTER WITH I2C™ INTERFACE]
分类和应用: 转换器模数转换器光电二极管
文件页数/大小: 22 页 / 340 K
品牌: TI [ TEXAS INSTRUMENTS ]
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ADS7828-Q1  
SBAS456A DECEMBER 2008REVISED OCTOBER 2009.......................................................................................................................................... www.ti.com  
Reading Data  
Data can be read from the ADS7828 by read addressing the part (LSB of address byte set to 1) and receiving  
the transmitted bytes. Converted data can be read from the ADS7828 only after a conversion has been initiated  
as described in the preceding section.  
Each 12-bit data word is returned in two bytes (see Figure 6), where D11 is the MSB of the data word, and D0 is  
the LSB. Byte 0 is sent first, followed by byte 1.  
MSB  
0
6
0
5
0
4
0
3
2
1
LSB  
D8  
Byte 0  
Byte 1  
D11  
D3  
D10  
D2  
D9  
D1  
D7  
D6  
D5  
D4  
D0  
Figure 6. Reading Data  
Reading in Fast or Standard (F/S) Mode  
Figure 7 shows the interaction between the master and the slave ADS7828 in fast or standard (F/S) mode. At the  
end of reading conversion data, the ADS7828 can be issued a repeated Start condition by the master to secure  
bus operation for subsequent conversions of the A/D converter. This would be the most efficient way to perform  
continuous conversions.  
ADC Power-Down Mode  
ADC Sampling Mode  
S
1
0
0
1
0
A1 A0  
W
A
SD C2 C1 C0 PD1 PD0  
Command Byte  
X
X
A
Write-Addressing Byte  
ADC Converting Mode  
ADC Power-Down Mode  
(depending on power-down selection bits)  
Sr  
1
0
0
1
0
A1 A0  
R
A
0
0
0
0
D11 D10 D9 D8  
A
D7 D6...D1 D0  
N
P
See Note (1)  
Read-Addressing Byte  
2 x (8 bits + ack/nack)  
A = Acknowledge (SDA low)  
N = Not acknowledge (SDA high)  
S = Start condition  
W = 0 (write)  
R = 1 (read)  
From Master to Slave  
From Slave to Master  
P = Stop condition  
Sr = Repeated Start condition  
NOTE: (1) To secure bus operation and loop back to the stage of write-addressing for next conversion, use Repeated Start.  
Figure 7. Typical Read Sequence in F/S Mode  
16  
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Copyright © 2008–2009, Texas Instruments Incorporated  
Product Folder Link(s): ADS7828-Q1