TIMING CHARACTERISTICS(1) (Cont.)
At TA = –40°C to +85°C, +VDD = +2.7V, unless otherwise noted.
PARAMETER
SYMBOL
CONDITIONS
MIN
MAX
UNITS
Rise Time of SDA Signal
tRDA
Standard Mode
Fast Mode
High-Speed Mode, CB = 100pF max(2)
High-Speed Mode, CB = 400pF max(2)
1000
300
80
ns
ns
ns
ns
20 + 0.1CB
10
20
160
Fall Time of SDA Signal
tFDA
Standard Mode
Fast Mode
High-Speed Mode, CB = 100pF max(2)
High-Speed Mode, CB = 400pF max(2)
300
300
80
ns
ns
ns
ns
20 + 0.1CB
10
20
160
Setup Time for STOP Condition
tSU;
Standard Mode
Fast Mode
High-Speed Mode
4.0
600
160
µs
ns
ns
STO
Capacitive Load for SDA and SCL
Line
CB
tSP
400
pF
Pulse Width of Spike Suppressed
Fast Mode
High-Speed Mode
50
10
ns
ns
Noise Margin at the HIGH Level for
Each Connected Device (Including
Hysteresis)
Standard Mode
Fast Mode
High-Speed Mode
VNH
0.2VDD
0.1VDD
V
V
Noise Margin at the LOW Level for
Each Connected Device (Including
Hysteresis)
Standard Mode
Fast Mode
High-Speed Mode
VNL
NOTES: (1) All values referred to VIHMIN and VILMAX levels.
(2) For bus line loads CB between 100pF and 400pF the timing parameters must be linearly interpolated.
(3) A device must internally provide a data hold time to bridge the undefined part between VIH and VIL of the falling edge of the SCLH signal. An
input circuit with a threshold as low as possible for the falling edge of the SCLH signal minimizes this hold time.
ADS7828
SBAS181C
6
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