ADS1291
ADS1292
ADS1292R
SBAS502A –DECEMBER 2011–REVISED MARCH 2012
www.ti.com
PIN ASSIGNMENTS
NAME
AVDD
TERMINAL
FUNCTION
DESCRIPTION
12
13
17
14
18
24
19
21
22
23
26
25
3
Supply
Supply
Analog supply
AVSS
Analog ground
CLK
Digital input
Master clock input
CLKSEL
CS
Digital input
Master clock select
Digital input
Chip select
DGND
Supply
Digital ground
DIN
Digital input
SPI data in
DOUT
Digital output
Digital output
Supply
SPI data out
DRDY
Data ready; active low
DVDD
Digital power supply
GPIO1/RCLK1
GPIO2/RCLK2
IN1N(1)
Digital input/output
Digital input/output
Analog input
Analog input
Analog input
Analog input
Analog output
Analog output
Analog output
Analog output
Digital input
General-purpose I/O 1 or resp clock 1 (ADS1292R)
General-purpose I/O 2 or resp clock 2 (ADS1292R)
Differential analog negative input 1
Differential analog positive input 1
Differential analog negative input 2
Differential analog positive input 2
PGA1 inverting output
IN1P(1)
IN2N(1)
IN2P(1)
4
5
6
PGA1N
1
PGA1P
2
PGA1 noninverting output
PGA2 inverting output
PGA2N
7
PGA2P
8
PGA2 noninverting output
Power-down or system reset; active low
PWDN/RESET
RESP_MODN/IN3N(1)
RESP_MODP/IN3P(1)
15
32
31
Analog input/output
Analog input/output
N-side respiration excitation signal for respiration or auxiliary input 3N
P-side respiration excitation signal for respiration or auxiliary input 3P
Right leg drive input to MUX or RLD amplifier noninverting input; connect
to AVDD if not used
RLDIN/RLDREF
29
Analog input
RLDINV
RLDOUT
SCLK
28
30
20
16
11
27
10
9
Analog input
Analog input
Digital input
Digital input
—
Right leg drive inverting input; connect to AVDD if not used
Right leg drive output
SPI clock
START
VCAP1
VCAP2
VREFN
VREFP
Start conversion
Analog bypass capacitor
—
Analog bypass capacitor
Analog input
Analog input/output
Negative reference voltage; must be connected to AVSS
Positive reference voltage
(1) Connect unused analog inputs to AVDD.
12
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