ADC0831-N, ADC0832-N, ADC0834-N, ADC0838-N
SNAS531B –AUGUST 1999–REVISED MARCH 2013
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Converter and Multiplexer Electrical Characteristics
The following specifications apply for VCC = V+ = VREF = 5V, VREF ≤ VCC +0.1V, TA = Tj = 25°C, and fCLK = 250 kHz unless
otherwise specified. Boldface limits apply from TMIN to TMAX
.
BCV, CCV, CCWM, BCN
and CCN Devices
CIWM Devices
Parameter
Conditions
Units
Tested
Limit(2)
Design
Limit(3)
Tested
Limit(2)
Design
Limit(3)
Typ(1)
Typ(1)
CONVERTER AND MULTIPLEXER CHARACTERISTICS
ADC0838BCV
ADC0834BCN
±½
±½
±1
±½
±½
±1
Total
ADC0838CCV
Unadjusted
Error
VREF = 5.00 V(4)
LSB (Max)
ADC0831/2/4/8CCN
ADC0831/2/4/8CCWM
ADC0832/8CIWM
±1
±1
±1
±1
±1
Minimum Reference Input
Resistance(5)
3.5
3.5
1.3
3.5
3.5
1.3
5.4
1.3
5.9
kΩ
kΩ
V
Maximum Reference Input
Resistance(5)
5.9
Maximum Common-Mode Input
Range(6)
VCC
+0.05
VCC
+0.05
VCC+0.05
Minimum Common-Mode Input
Range(6)
GND
−0.05
GND
−0.05
GND
−0.05
V
DC Common-Mode Error
±1/16
±1/16
±¼
1
±1/16
±1/16
±¼
1
±¼
1
LSB
15 mA into V+, VCC
N.C.,
VREF = 5V
=
Change in zero error from VCC=5V
to internal zener operation(7)
LSB
VZ, internal diode
MIN 15 mA into V+
MAX
6.3
8.5
6.3
8.5
6.3
8.5
±¼
−1
breakdown (at V+)(7)
V
Power Supply Sensitivity
VCC = 5V ± 5%
±¼
±¼
±¼
LSB
μA
On Channel = 5V
Off Channel = 0V
On Channel = 0V
Off Channel = 5V
On Channel = 0V
Off Channel = 5V
On Channel = 5V
Off Channel = 0V
−0.2
−1
−0.2
IOFF, Off Channel Leakage
Current(8)
+0.2
+1
+0.2
−0.2
+0.2
+1
−1
+1
μA
μA
μA
−0.2
−1
ION, On Channel Leakage Current(8)
+0.2
+1
(1) Typicals are at 25°C and represent most likely parametric norm.
(2) Tested limits are ensured to TI's AOQL (Average Outgoing Quality Level).
(3) Ensured but not 100% production tested. These limits are not used to calculate outgoing quality levels.
(4) Total unadjusted error includes offset, full-scale, linearity, and multiplexer errors.
(5) Cannot be tested for ADC0832-N.
(6) For VIN(−) ≥ VIN(+) the digital output code will be 0000 0000. Two on-chip diodes are tied to each analog input (see Functional Block
Diagram) which will forward conduct for analog input voltages one diode drop below ground or one diode drop greater than the VCC
supply. Be careful, during testing at low VCC levels (4.5V), as high level analog inputs (5V) can cause this input diode to
conduct—especially at elevated temperatures, and cause errors for analog inputs near full-scale. The spec allows 50 mV forward bias of
either diode. This means that as long as the analog VIN or VREF does not exceed the supply voltage by more than 50 mV, the output
code will be correct. To achieve an absolute 0 VDC to 5 VDC input voltage range will therefore require a minimum supply voltage of 4.950
VDC over temperature variations, initial tolerance and loading.
(7) Internal zener diodes (6.3 to 8.5V) are connected from V+ to GND and VCC to GND. The zener at V+ can operate as a shunt regulator
and is connected to VCC via a conventional diode. Since the zener voltage equals the A/D's breakdown voltage, the diode insures that
VCC will be below breakdown when the device is powered from V+. Functionality is therefore ensured for V+ operation even though the
resultant voltage at VCC may exceed the specified Absolute Max of 6.5V. It is recommended that a resistor be used to limit the max
current into V+. (See Figure 24 in Functional Description)
(8) Leakage current is measured with the clock not switching.
4
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