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74LS173 参数 Datasheet PDF下载

74LS173图片预览
型号: 74LS173
PDF下载: 下载PDF文件 查看货源
内容描述: 4位D类寄存器具有三态输出 [4-BIT D-TYPE REGISTERS WITH 3-STATE OUTPUTS]
分类和应用: 输出元件
文件页数/大小: 19 页 / 560 K
品牌: TI [ TEXAS INSTRUMENTS ]
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SN54173, SN54LS173A, SN74173, SN74LS173A  
4-BIT D-TYPE REGISTERS  
WITH 3-STATE OUTPUTS  
SDLS067A – OCTOBER 1976 – REVISED JUNE 1999  
PARAMETER MEASUREMENT INFORMATION  
SERIES 54LS/74LS DEVICES  
V
CC  
V
CC  
Test  
Point  
Test  
Point  
R
L
S1  
V
CC  
R
L
(see  
Note B)  
From Output  
Under Test  
From Output  
Under Test  
(see Note B)  
R
L
C
L
5 kΩ  
From Output  
Under Test  
Test  
Point  
(see Note A)  
C
L
(see Note A)  
C
L
(see Note A)  
S2  
LOAD CIRCUIT FOR  
2-STATE  
TOTEM-POLE OUTPUTS  
LOAD CIRCUIT  
FOR OPEN-COLLECTOR OUTPUTS  
LOAD CIRCUIT  
FOR 3-STATE OUTPUTS  
3 V  
High-Level  
Timing  
Input  
1.3 V  
1.3 V  
1.3 V  
1.3 V  
Pulse  
0 V  
t
w
t
h
t
su  
3 V  
0 V  
Data  
Input  
Low-Level  
Pulse  
1.3 V  
1.3 V  
1.3 V  
VOLTAGE WAVEFORMS  
PULSE DURATIONS  
VOLTAGE WAVEFORMS  
SETUP AND HOLD TIMES  
Output  
3 V  
0 V  
Control  
(low-level  
enabling)  
1.3 V  
1.3 V  
3 V  
0 V  
1.3 V  
1.3 V  
Input  
t
t
t
PZL  
PLZ  
1.5 V  
Waveform 1  
S2 Open  
(see Notes C  
and D)  
t
t
PLH  
PHL  
1.3 V  
V
In-Phase  
Output  
(see Note D)  
OH  
OL  
V
OL  
V
OL  
+ 0.3 V  
1.3 V  
1.3 V  
1.3 V  
V
t
PZH  
PHZ  
t
t
PHL  
PLH  
V
OH  
V
OH  
Waveform 2  
S2 Closed  
(see Notes C  
and D)  
V
Out-of-Phase  
Output  
(see Note D)  
– 0.3 V  
OH  
OL  
1.3 V  
1.3 V  
V
1.5 V  
VOLTAGE WAVEFORMS  
PROPAGATION DELAY TIMES  
VOLTAGE WAVEFORMS  
ENABLE AND DISABLE TIMES, 3-STATE OUTPUTS  
NOTES: A.  
C includes probe and jig capacitance.  
L
B. All diodes are 1N3064 or equivalent.  
C. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.  
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.  
D. S1 and S2 are closed for t  
, t  
, t  
, and t  
; S1 is open and S2 is closed for t  
PLZ PZH  
; S1 is closed and S2 is open for t .  
PLH PHL PHZ  
PZL  
E. Phase relationships between inputs and outputs have been chosen arbitrarily for these examples.  
F. All input pulses are supplied by generators having the following characteristics: PRR 1 MHz, Z 50 , t 15 ns, t 6 ns.  
O
r
f
G. The outputs are measured one at a time with one input transition per measurement.  
Figure 2. Load Circuits and Voltage Waveforms  
10  
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
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