ꢀ
ꢁ
ꢅ
ꢔ
ꢂ
ꢃ
ꢇ
ꢃ
ꢄ
ꢐ
ꢄ
ꢃ
ꢈ
ꢃ
ꢇ
ꢅ
ꢆ
ꢉ
ꢑ
ꢀ
ꢁ
ꢌ
ꢒ
ꢂ
ꢍ
ꢃ
ꢍ
ꢕ
ꢄ
ꢎ
ꢃ
ꢅ
ꢋ
ꢇ
ꢆ
ꢀ
ꢀ
ꢑ
ꢁ
ꢂ
ꢃ
ꢗ
ꢃ
ꢈ
ꢈ
ꢀ
ꢀ
ꢄ
ꢗ
ꢄ
ꢃ
ꢃ
ꢅ
ꢘ
ꢅ
ꢆ
ꢆ
ꢀ
ꢀ
ꢁ
ꢁ
ꢙ
ꢂ
ꢅ
ꢒ
ꢃ
ꢃ
ꢈ
ꢈ
ꢔ
ꢀ
ꢀ
ꢑ
ꢄ
ꢄ
ꢗ
ꢃ
ꢃ
ꢀ
ꢇ
ꢇ
ꢀ
ꢁ
ꢅ
ꢃ
ꢄ
ꢃ
ꢅ
ꢆ
ꢀ
ꢁ
ꢊ
ꢋ
ꢏ
ꢆ
ꢁ
ꢅ
ꢄ
ꢎ
ꢐ
ꢈꢋ
ꢁ
ꢑ
ꢊ ꢒ
ꢃ
ꢐ
ꢈ
ꢋ
ꢁ
ꢑ
ꢓ
ꢁ
ꢋ
ꢁ
ꢊ
ꢐ
ꢈ
ꢁ
ꢖ
ꢋ
ꢒ
ꢋ
ꢊ
ꢑ
ꢁ
SDLS053B − OCTOBER 1976 − REVISED MAY 2004
APPLICATION INFORMATION
16-Line Data (active low)
0
0
1
1
2
2
3
3
4
5
5
6
6
7
7
8
0
9 10 11 12 13 14 15
Enable
(active low)
4
EI
1
2
3
4
5
6
7
EI
’148/’LS148
A1
’148/LS148
EO A0
A2 GS
EO
A0
A1
A2
GS
’08/’LS08
Priority Flag
(active low)
0
1
2
Encoded Data (active low)
16-Line Data (active low)
3
0
0
1
1
2
2
3
4
5
6
6
7
8
0
9 10 11 12 13 14 15
Enable
(active low)
3
4
5
7
EI
1
2
3
4
5
6
7
EI
’148/’LS148
A1
’148/’LS148
EO A0
A2 GS
EO
A0
A1
A2
GS
’HC00
Priority Flag
(active high)
0
1
2
3
Encoded Data (active high)
Figure 3. Priority Encoder for 16 Bits
Because the ’147/’LS147 and ’148/’LS148 devices are combinational logic circuits, wrong addresses can appear
during input transients. Moreover, for the ’148/’LS148 devices, a change from high to low at EI can cause a transient
low on GS when all inputs are high. This must be considered when strobing the outputs.
13
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