54AC11027, 74AC11027
TRIPLE 3-INPUT POSITIVE-NOR GATES
SCAS019A – JULY 1987 – REVISED APRIL 1993
54AC11027 . . . J PACKAGE
74AC11027 . . . D OR N PACKAGE
(TOP VIEW)
• Flow-Through Architecture Optimizes
PCB Layout
• Center-Pin V
and GND Configurations
Minimize High-Speed Switching Noise
CC
1B
1C
2A
V
1A
1Y
2Y
GND
GND
3Y
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
• EPIC (Enhanced-Performance Implanted
CMOS) 1-µm Process
• 500-mA Typical Latch-Up Immunity
at 125°C
CC
V
CC
2B
2C
3A
• Package Options Include Plastic
Small-Outline Packages, Ceramic Chip
Carriers, and Standard Plastic and Ceramic
300-mil DIPs
3C
3B
54AC11027 . . . FK PACKAGE
(TOP VIEW)
description
These devices contain three independent 3-input
NOR gates. They perform the Boolean functions
Y = A + B + C or Y = A B C in positive logic.
3
2
1
20 19
18
1C
1B
NC
1A
1Y
2C
17 3A
The 54AC11027 is characterized for operation
over the full military temperature range of –55°C
to 125°C. The 74AC11027 is characterized for
operation from –40°C to 85°C.
4
5
6
7
8
16
15
14
NC
3B
3C
9 10 11 12 13
FUNCTION TABLE
(each gate)
INPUTS
OUTPUT
Y
A
H
X
X
L
B
X
H
X
L
C
X
X
H
L
NC – No internal connection
L
L
L
H
†
logic symbol
logic diagram (positive logic)
1
1A
≥ 1
16
2
3
6
1
1A
1B
1Y
2Y
3Y
2
3
6
16
1B
1Y
15
15
1C
1C
14
2A
14
2A
11
2B
2Y
3Y
11
10
2C
2B
10
2C
9
3A
8
3B
9
7
3A
8
3C
3B
7
3C
†
This symbol is in accordance with ANSI/IEEE Std 91-1984
and IEC Publication 617-12.
Pin numbers shown are for the D, J, and N packages.
EPIC is a trademark of Texas Instruments Incorporated.
Copyright 1993, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
2–1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TI [ TEXAS INSTRUMENTS ]
