78M6612 Data Sheet
DS_6612_001
VBAT
Battery
Current
BROWNOUT
MPU Mode
Xtal
MPU Clock
Source
14.5 CK32
cycles
WAKE
PLL_OK
Internal
RESETZ
1024 CK32
cycles
VBAT_OK
time
Figure 24: Power-Up Timing with VBAT Only
2.4 Fault and Reset Behavior
Reset Mode: When the RESET pin is pulled high all digital activity stops. The oscillator and RTC
module continue to run. Additionally, all I/O RAM bits are set to their default states. As long as V1, the
input voltage at the power fault block, is greater than VBIAS, the internal 2.5 V regulator will continue to
provide power to the digital section.
Once initiated, the reset mode will persist until the reset timer times out, signified by the internal signal
WAKE rising. This will occur in 4100 cycles of the real time clock after RESET goes low, at which time
the MPU will begin executing its preboot and boot sequences from address 00. See Section 1.5.12
Program Security for more description of preboot and boot.
If system power is not present, the reset timer duration will be 2 cycles of the crystal clock, at which time
the MPU will begin executing in BROWNOUT mode, starting at address 00.
Power Fault Circuit: The 78M6612 includes a comparator to monitor system power fault conditions.
When the output of the comparator falls (V1<VBIAS), the I/P RAM bits PLL_OK is zeroed and the part
switches to BROWNOUT mode if a battery is present. Once, system power returns, the MPU remains in
reset and does not start Mission Mode until 4100 oscillator clocks later, when PLL_OK rises. If a battery
is not present, indicated by BAT_OK=0, WAKE will fall and the part will enter SLEEP mode.
There are several conditions the part could be in as system power returns. If the part is in BROWNOUT
mode, it will automatically switch to mission mode when PLL_OK rises. It will receive an interrupt
indicating this. No configuration bits will be reset or reconfigured during this transition.
If the part is in LCD or SLEEP mode when system power returns, it will also switch to mission mode
when PLL_OK rises. In this case, all configuration bits will be in the reset state due to WAKE having
been zero. The RTC clock will not be disturbed, but the MPU RAM must be re-initialized. The hardware
watchdog timer will become active when the part enters MISSION mode.
60
Rev. 1.2
TERIDIAN [ TERIDIAN SEMICONDUCTOR CORPORATION ]
