DS_6612_001
78M6612 Data Sheet
5.4 Performance Specifications
5.4.1 Input Logic Levels
Parameter
Condition
Min
Typ
Max
Unit
V
Digital high-level input voltage†, VIH
Digital low-level input voltage†, VIL
2
0.8
V
Input pull-up current, IIL
E_RXTX,
VIN=0V, ICE_E=1
10
10
-1
100
100
1
µA
µA
µA
E_RST, CKTEST
Other digital inputs
0
0
Input pull down current, IIH
ICE_E
VIN=V3P3D
10
-1
100
1
µA
µA
Other digital inputs
†In battery powered modes, digital inputs should be below 0.3 V or above 2.5 V to minimize battery
current.
5.4.2 Output Logic Levels
Parameter
Condition
LOAD = 1 mA
LOAD = 15 mA
Min
Typ
Max
Unit
V3P3D
-0.4
I
I
V
Digital high-level output voltage VOH
V3P3D
-0.6
V
ILOAD = 1 mA
ILOAD = 15 mA
ISOURCE=1 mA
ISINK=20 mA
0
0.4
0.8
0.4
0.7
V
V
V
V
Digital low-level output voltage VOL
TX1 VOH (V3P3D-TX1)
TX1 VOL
5.4.3 Power-Fault Comparator
Parameter
Condition
Min
Typ
Max
Unit
Offset Voltage
V1-VBIAS
-20
+15
mV
Hysteresis Current
V1
Vin = VBIAS – 100 mV
+100 mV overdrive
0.8
2
1.2
10
µA
µs
Response Time
V1
5
WDT Disable Threshold (V1-V3P3A)
-400
-10
mV
5.4.4 Battery Monitor
BME=1
Parameter
Condition
Min
Typ
45
Max
Unit
Load Resistor
27
63
kΩ
FIR_LEN=0
FIR_LEN=1
-5.4
-2.3
-72
µV
µV
LSB Value - does not include the 9-
bit left shift at CE input.
-6.0
-2.6
-4.9
-2.0
Offset Error
Rev. 1.2
-200
+100
mV
91
TERIDIAN [ TERIDIAN SEMICONDUCTOR CORPORATION ]
