78M6613 Data Sheet
DS_6613_018
2.2 Reset Behavior
Reset Mode: When the RESET pin is pulled high all digital activity stops. The oscillator continues to
run. Additionally, all I/O RAM bits are set to their default states.
Once initiated, the reset mode will persist until the reset timer times out. This will occur in 4096 CK32
clock cycles (32768 Hz clock cycles from PLL block) after RESET goes low, at which time the MPU will
begin executing its preboot and boot sequences from address 00.
2.3 Data Flow
The data flow between CE and MPU is shown in Figure 5. In a typical application, the 32-bit compute
engine (CE) sequentially processes the samples from the voltage inputs on pins A0, A1, A2, and A3,
performing calculations to measure active power (Wh), reactive power (VARh), A2h, and V2h for
four-quadrant measurements. These measurements are then accessed by the MPU, processed further
and output using the peripheral devices available to the MPU.
IRQ
Processed
CE
MPU
Measurement
Data
Samples
Data
Post
-
Pre
-
Processor
Processor
I/O RAM (Configuration RAM)
Figure 5: MPU/CE Data Flow
12
Rev. 1.1
TERIDIAN [ TERIDIAN SEMICONDUCTOR CORPORATION ]
