73S8023C Data Sheet
DS_8023C_019
11 Typical Application Schematic
AUX2UC_to/from_uC
AUX1UC_to.from_uC
I/OUC_to/from_uC
STROBE_from_uC
See NOTE
6
CLKDIV1_from_uC
CLKDIV2_from_uC
5V/3V_select_from_uC
CLKOUT_to_uC
See NOTE
3
See note
VDD
7
External_clock_from uC
-
OR -
VDD
R3
Rext2
C4
C5
C2
L1
10uH
VDD
1
2
3
4
5
6
7
8
24
23
22
21
20
19
18
17
GND
LIN
XTALOUT
XTALIN
OFF
10uF
100nF
22pF
See NOTE
1
VDD
NC
PWRDN
PRES
PRES
CS
Y1
VDD
See NOTE
C3
GND
VDD
RSTIN
See note 2
73S8023C
1
22pF
CRYSTAL
C9
PWRDN_from_uC
CMDVCC
VDDF_ADJ
See NOTE
5
100nF
See NOTE
4
R1
Rext1
CS_from_uC
32QFN
CLKSEL_from_uC
OFF_interrupt_to_uC
RSTIN_from_uC
NOTES:
SO7816=1uF,
NDS/EMV=3.3uF
CMDVCC_from_uC
27pF
C8
27pF
C7
1) VDD supply must be = 2.7V to 3.6V DC).
2) Keep L1 close to pin 2.
3) Required if external clock from uP is used.
27pF
VDD
Low ESR (<100mohms) C1
should be placed near the SC
connecter contact
C1
C6
R2
4) Required if crystal is used.
20K
Y1, C2 and C3 must be removed if external clock is used.
5) Pin can not float. Must be driven or connected to GND if
power down function is not used.
Card detection
switch is
normally
CLK track should be routed
far from RST, I/O, C4 and
C8.
6) Internal pull-up allows it to be left open if unused.
closed.
7) Rext1 and Rext2 are external resistors to ground and
VDD to modify the VDD fault voltage. Can be left open.
8) Capacitors C7 and C8 are optional. C6 is mandatory for NDS.
Smart Card Connector
Figure 11: 73S8023C – Typical Application Schematic
Rev. 1.5
17
TERIDIAN [ TERIDIAN SEMICONDUCTOR CORPORATION ]
