73S1217F Data Sheet
DS_1217F_002
Keypad Control/Status Register (KSTAT): 0xD4 Å 0x00
This register is used to control the hardware keypad scanning and detection capabilities, as well as the
keypad interrupt control and status.
Table 72: The KSTAT Register
MSB
LSB
–
–
–
–
KEYCLK HWSCEN KEYDET KYDTEN
Bit
Symbol
Function
KSTAT.7
KSTAT.6
KSTAT.5
KSTAT.4
KSTAT.3
–
–
–
–
KEYCLK
The current state of the keyboard clock can be read from this bit.
Hardware Scan Enable – When set, the hardware will perform automatic
KSTAT.2
KSTAT.1
KSTAT.0
HWSCEN key scanning. When cleared, the firmware must perform the key scanning
manually (bypass mode).
Key Detect – When HWSCEN = 1 this bit is set causing an interrupt that
indicates a valid key press was detected and the key location can be read
from the Keypad Column and Row registers. When HWSCEN = 0, this bit
is an interrupt which indicates a falling edge on any Row input if all Row
inputs had been high previously (note: multiple Key Detect interrupts may
KEYDET
occur in this case due to the keypad switch bouncing). In all cases, this bit
is cleared when read. When HWSCEN = 0 and the keypad interface 1kHz
clock is disabled, a key press will still set this bit and cause an interrupt.
Key Detect Enable – When set, the KEYDET bit can cause an interrupt and
KYDTEN
when cleared the KEYDET cannot cause an interrupt. KEYDET can still
get set even if the interrupt is not enabled.
72
Rev. 1.2
TERIDIAN [ TERIDIAN SEMICONDUCTOR CORPORATION ]
