73S1217F Data Sheet
DS_1217F_001
Communication Interfaces:
FEATURES
80515 Core:
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Full-duplex serial interface (1200 to 115kbps UART)
USB 2.0 Full Speed 12Mbps Interface, PC/SC
compliant with 4 Endpoints:
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1 clock cycle per instruction (most instructions)
CPU clocked up to 24MHz
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Control (16B FIFO)
64kB Flash memory (lockable)
2kB XRAM (User Data Memory)
256 byte IRAM
Interrupt IN (32B FIFO)
Bulk IN (128B FIFO)
Bulk OUT (128B FIFO)
I2C Master Interface (400kbps)
Hardware watchdog timer
Oscillators:
Man-Machine Interface and I/Os:
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Single low-cost 6MHz to 12MHz crystal
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6x5 Keyboard (hardware scanning, debouncing and
scrambling)
Optional 32kHz crystal (with internal RTC)
An Internal PLL provides all the necessary clocks to
each block of the system
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(8) User I/Os
Single programmable current output (LED)
Interrupts:
Voltage Detection:
Analog Input (detection range: 1.0V to 1.5V)
Operating Voltage:
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Standard 80C515 4-priority level structure
9 different sources of interrupt to the core
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Power Down Modes:
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Single supply 2.7V to 6.5V operation (VPC)
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2 standard 80C515 Power Down and IDLE modes
USB supply (VBUS 4.4V to 5.5V) with or without
battery back up operation (VBAT 4.0V to 6.5V).
Sub-μA OFF mode
ON/OFF Main System Power Switch:
Input for an SPST momentary switch to ground
Timers:
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Automated detection of voltage presence - Priority on
VBUS over VBAT
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DC-DC Converter:
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Step-up converter
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(2) Standard 80C52 timers T0 and T1
Generates an intermediary voltage VP
Requires a single 10μH Inductor
3.3V supply available for external circuits
(1) 16-bit timer that can generate RTC interrupts
from the 32kHz clock
Built-in ISO-7816 Card Interface:
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LDO regulator produces VCC for the card
(1.8V, 3V or 5V)
Operating Temperature:
-40°C to 85°C
Package:
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Full compliance with EMV 4.1
Activation/Deactivation sequencers
Auxiliary I/O lines (C4-C8 signals)
7kV ESD protection on all interface pins
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68-pin QFN
Software:
Communication with Smart Cards:
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Two-level Application Programming Interface
(ANSI C-language libraries)
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ISO 7816 UART for T=0, T=1
USB, T=0 / T=1 ISO and EMV compliant smart card
protocol layers
CCID reference design and Windows® driver
(2) 2-Byte FIFOs for transmit and receive
Configured to drive multiple external Teridian
73S8010xx interfaces (for multi-SAM architectures)
2
Rev. 1.2
TERIDIAN [ TERIDIAN SEMICONDUCTOR CORPORATION ]
