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73S1217F-IMR/F 参数 Datasheet PDF下载

73S1217F-IMR/F图片预览
型号: 73S1217F-IMR/F
PDF下载: 下载PDF文件 查看货源
内容描述: 总线供电80515的系统级芯片, USB , ISO 7816 / EMV ,密码键盘和更多 [Bus-Powered 80515 System-on-Chip with USB, ISO 7816 / EMV, PINpad and More]
分类和应用: 多功能外围设备微控制器和处理器时钟
文件页数/大小: 140 页 / 1066 K
品牌: TERIDIAN [ TERIDIAN SEMICONDUCTOR CORPORATION ]
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DS_1217F_002  
73S1217F Data Sheet  
1.5.2 IRAM Special Function Registers (Generic 80515 SFRs)  
Table 7 shows the location of the SFRs and the value they assume at reset or power-up.  
Table 7: IRAM Special Function Registers Reset Values  
Name  
SP  
Location Reset Value Description  
0x81  
0x82  
0x83  
0x84  
0x85  
0x86  
0x87  
0x88  
0x89  
0x8A  
0x8B  
0x8C  
0x8D  
0x8F  
0x90  
0x91  
0x92  
0x94  
0x98  
0x99  
0x9A  
0x9B  
0x9C  
0x9D  
0xA8  
0xA9  
0xAA  
0xB2  
0xB7  
0xB8  
0xB9  
0xBA  
0xBB  
0xC0  
0xC8  
0xD0  
0XD1  
0x07  
0x00  
0x00  
0x00  
0x00  
0x00  
0x00  
0x00  
0x00  
0x00  
0x00  
0x00  
0x00  
0x0A  
0xFF  
0xFF  
0x00  
0x00  
0x00  
0x00  
0x00  
0x00  
0x00  
0x00  
0x00  
0x00  
0xD9  
0x00  
0x00  
0x00  
0x00  
0x03  
0x03  
0x00  
0x00  
0x00  
0x1F  
Stack Pointer  
DPL  
Data Pointer Low 0  
DPH  
Data Pointer High 0  
DPL1  
Data Pointer Low 1  
DPH1  
WDTREL  
PCON  
TCON  
TMOD  
TL0  
Data Pointer High 1  
Watchdog Timer Reload register  
Power Control  
Timer/Counter Control  
Timer Mode Control  
Timer 0, low byte  
TL1  
Timer 1, high byte  
TH0  
Timer 0, low byte  
TH1  
Timer 1, high byte  
MCLKCtl  
USR70  
UDIR70  
DPS  
Master Clock Control  
User Port Data (7:0)  
User Port Direction (7:0)  
Data Pointer Select Register  
Flash Erase  
ERASE  
S0CON  
S0BUF  
IEN2  
Serial Port 0, Control Register  
Serial Port 0, Data Buffer  
Interrupt Enable Register 2  
Serial Port 1, Control Register  
Serial Port 1, Data Buffer  
Serial Port 1, Reload Register, low byte  
Interrupt Enable Register 0  
Interrupt Priority Register 0  
Serial Port 0, Reload Register, low byte  
Flash Control  
S1CON  
S1BUF  
S1RELL  
IEN0  
IP0  
S0RELL  
FLSHCTL  
PGADDR  
IEN1  
Flash Page Address  
Interrupt Enable Register 1  
Interrupt Priority Register 1  
Serial Port 0, Reload Register, high byte  
Serial Port 1, Reload Register, high byte  
Interrupt Request Control Register  
Timer 2 Control  
IP1  
S0RELH  
S1RELH  
IRCON  
T2CON  
PSW  
Program Status Word  
Keypad Column  
KCOL  
Rev. 1.2  
19  
 
 
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