DS_1210F_001
73S1210F Data Sheet
Smart Card VCC Control/Status Register (VccCtl): 0xFE03 0x00
This register is used to control the power up and power down of the integrated smart card interface. It is
used to determine whether to apply 5V, 3V, or 1.8 to the smart card. Perform the voltage selection with
one write operation, setting both VCCSEL.1 and VCCSEL.0 bits simultaneously. The VDDFLT bit (if
enabled) will provide an emergency deactivation of the internal smart card slot. See the VDD Fault
Detect Function section for more detail.
Table 75: The VccCtl Register
MSB
LSB
SCPWRDN
VCCSEL.1 VCCSEL.0 VDDFLT
RDYST
VCCOK
–
–
Bit
Symbol
Function
Setting non-zero value for bits 7,6 will begin activation sequence with target
Vcc as given below:
VccCtl.7
VCCSEL.1
State VCCSEL.1
VCCSEL.0
VCC
0V
1
2
3
4
0
0
1
1
0
1
0
1
1.8V
3.0V
5V
A card event or VCCOK going low will initiate a deactivation sequence.
When the deactivation sequence for RST, CLK and I/O is complete, VCC will
be turned off. When this type of deactivation occurs, the bits must be reset
before initiating another activation.
VccCtl.6
VCCSEL.0
When there is a VDD Fault event, this bit will be set = 0. This causes
VCCSEL.1 and VCCSEL.0 bits to be immediately set = 0 to begin
deactivation.
VccCtl.5
VccCtl.4
VDDFLT
RDYST
If this bit is set = 1, the activation sequence will start when bit VCCOK is set =
1. If not set, the deactivation sequence shall start when the VCCTMR times
out.
VccCtl.3
VccCtl.2
VccCtl.1
VCCOK
(Read only). Indicates that VCC output voltage is stable.
–
–
This bit controls the power-off mode of the 73S1210F circuit.
1 = power off, 0 = normal operation. When in power down mode,
VDD = 0V. VDD can only be turned on by pressing the ON/OFF switch or by
application of 5V to VBUS. If VBUS power is available and SCPWRDN bit is set,
it has no effect until VBUS is removed and VDD will shut off.
VccCtl.0 SCPWRDN
Rev. 1.4
83
TERIDIAN [ TERIDIAN SEMICONDUCTOR CORPORATION ]
