欢迎访问ic37.com |
会员登录 免费注册
发布采购

73S1209F-68IMR/F 参数 Datasheet PDF下载

73S1209F-68IMR/F图片预览
型号: 73S1209F-68IMR/F
PDF下载: 下载PDF文件 查看货源
内容描述: 自包含的密码键盘,智能卡读卡器IC的UART至ISO7816 / EMV桥接IC [Self-Contained PINpad, Smart Card Reader IC UART to ISO7816 / EMV Bridge IC]
分类和应用:
文件页数/大小: 123 页 / 1421 K
品牌: TERIDIAN [ TERIDIAN SEMICONDUCTOR CORPORATION ]
 浏览型号73S1209F-68IMR/F的Datasheet PDF文件第43页浏览型号73S1209F-68IMR/F的Datasheet PDF文件第44页浏览型号73S1209F-68IMR/F的Datasheet PDF文件第45页浏览型号73S1209F-68IMR/F的Datasheet PDF文件第46页浏览型号73S1209F-68IMR/F的Datasheet PDF文件第48页浏览型号73S1209F-68IMR/F的Datasheet PDF文件第49页浏览型号73S1209F-68IMR/F的Datasheet PDF文件第50页浏览型号73S1209F-68IMR/F的Datasheet PDF文件第51页  
DS_1209F_004  
73S1209F Data Sheet  
Interrupt Enable 0 Register (IEN0): 0xA8 Å 0x00  
Table 44: The IEN0 Register  
MSB  
EAL  
LSB  
EX0  
WDT  
ET2  
ES0  
ET1  
EX1  
ET0  
Bit  
Symbol  
EAL  
Function  
IEN0.7  
IEN0.6  
EAL = 0 – disable all interrupts.  
Watchdog timer refresh flag.  
WDT  
Set to initiate a refresh of the watchdog timer. Must be set directly before  
SWDT is set to prevent an unintentional refresh of the watchdog timer. WDT  
is reset by hardware 12 clock cycles after it has been set.  
IEN0.5  
IEN0.4  
IEN0.3  
IEN0.2  
IEN0.1  
IEN0.0  
ES0  
ET1  
EX1  
ET0  
EX0  
ES0 = 0 – disable serial channel 0 interrupt.  
ET1 = 0 – disable timer 1 overflow interrupt.  
EX1 = 0 – disable external interrupt 1.  
ET0 = 0 – disable timer 0 overflow interrupt.  
EX0 = 0 – disable external interrupt 0.  
Interrupt Enable 1 Register (IEN1): 0xB8 Å 0x00  
Table 45: The IEN1 Register  
MSB  
LSB  
SWDT  
EX6  
EX5  
EX4  
EX3  
EX2  
Bit  
Symbol  
Function  
IEN1.7  
IEN1.6  
SWDT Watchdog timer start/refresh flag. Set to activate/refresh the watchdog  
timer. When directly set after setting WDT, a watchdog timer refresh is  
performed. Bit SWDT is reset by the hardware 12 clock cycles after it has  
been set.  
IEN1.5  
IEN1.4  
IEN1.3  
IEN1.2  
IEN1.1  
IEN1.0  
EX6  
EX5  
EX4  
EX3  
EX2  
EX6 = 0 – disable external interrupt 6.  
EX5 = 0 – disable external interrupt 5.  
EX4 = 0 – disable external interrupt 4.  
EX3 = 0 – disable external interrupt 3.  
EX2 = 0 – disable external interrupt 2.  
Rev. 1.2  
47