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73S1209F-68IMR/F 参数 Datasheet PDF下载

73S1209F-68IMR/F图片预览
型号: 73S1209F-68IMR/F
PDF下载: 下载PDF文件 查看货源
内容描述: 自包含的密码键盘,智能卡读卡器IC的UART至ISO7816 / EMV桥接IC [Self-Contained PINpad, Smart Card Reader IC UART to ISO7816 / EMV Bridge IC]
分类和应用:
文件页数/大小: 123 页 / 1421 K
品牌: TERIDIAN [ TERIDIAN SEMICONDUCTOR CORPORATION ]
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73S1209F Data Sheet  
DS_1209F_004  
Internal Data Memory: The Internal data memory provides 256 bytes (0x00 to 0xFF) of data memory.  
The internal data memory address is always one byte wide and can be accessed by either direct or  
indirect addressing. The Special Function Registers occupy the upper 128 bytes. This SFR area is  
available only by direct addressing. Indirect addressing accesses the upper 128 bytes of Internal  
RAM.  
The lower 128 bytes contain working registers and bit-addressable memory. The lower 32 bytes form  
four banks of eight registers (R0-R7). Two bits on the program memory status word (PSW) select which  
bank is in use. The next 16 bytes form a block of bit-addressable memory space at bit addressees 0x00-  
0x7F. All of the bytes in the lower 128 bytes are accessible through direct or indirect addressing. Table 4  
shows the internal data memory map.  
Table 4: Internal Data Memory Map  
Address  
0xFF  
0x80  
Direct Addressing  
Indirect Addressing  
RAM  
Special Function  
Registers (SFRs)  
0x7F  
0x30  
Byte-addressable area  
0x2F  
0x20  
Byte or bit-addressable area  
Register banks R0…R7 (x4)  
0x1F  
0x00  
External Data Memory: While the 80515 can address up to 64KB of external data memory in the space  
from 0x0000 to 0xFFFF, only the memory ranges shown in Figure 2 contain physical memory. The  
80515 writes into external data memory when the MPU executes a MOVX @Ri,A or MOVX @DPTR,A  
instruction. The MPU reads external data memory by executing a MOVX A,@Ri or MOVX A,@DPTR  
instruction.  
There are two types of instructions, differing in whether they provide an eight-bit or sixteen-bit indirect  
address to the external data RAM.  
In the first type (MOVX A,@Ri), the contents of R0 or R1, in the current register bank, provide the eight  
lower-ordered bits of address. This method allows the user access to the first 256 bytes of the 2KB of  
external data RAM. In the second type of MOVX instruction (MOVX A,@DPTR), the data pointer  
generates a sixteen-bit address.  
14  
Rev. 1.2